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L3G4200D датащи(PDF) 37 Page - STMicroelectronics |
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L3G4200D датащи(HTML) 37 Page - STMicroelectronics |
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37 / 42 page ![]() L3G4200D Register description Doc ID 17116 Rev 3 37/42 Interrupt source register. Read only register. Reading at this address clears INT1_SRC IA bit (and eventually the interrupt signal on INT1 pin) and allows the refreshment of data in the INT1_SRC register if the latched option was chosen. 7.17 INT1_THS_XH (32h) 7.18 INT1_THS_XL (33h) 7.19 INT1_THS_YH (34h) Table 51. INT1_SRC description IA Interrupt active. Default value: 0 (0: no interrupt has been generated; 1: one or more interrupts have been generated) ZH Z high. Default value: 0 (0: no interrupt, 1: Z High event has occurred) ZL Z low. Default value: 0 (0: no interrupt; 1: Z Low event has occurred) YH Y high. Default value: 0 (0: no interrupt, 1: Y High event has occurred) YL Y low. Default value: 0 (0: no interrupt, 1: Y Low event has occurred) XH X high. Default value: 0 (0: no interrupt, 1: X High event has occurred) XL X low. Default value: 0 (0: no interrupt, 1: X Low event has occurred) Table 52. INT1_THS_XH register - THSX14 THSX13 THSX12 THSX11 THSX10 THSX9 THSX8 Table 53. INT1_THS_XH description THSX14 - THSX9 Interrupt threshold. Default value: 0000 0000 Table 54. INT1_THS_XL register THSX7 THSX6 THSX5 THSX4 THSX3 THSX2 THSX1 THSX0 Table 55. INT1_THS_XL description THSX7 - THSX0 Interrupt threshold. Default value: 0000 0000 Table 56. INT1_THS_YH register - THSY14 THSY13 THSY12 THSY11 THSY10 THSY9 THSY8 Table 57. INT1_THS_YH description THSY14 - THSY9 Interrupt threshold. Default value: 0000 0000 |
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