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L3G4200D датащи(PDF) 36 Page - STMicroelectronics

номер детали L3G4200D
подробное описание детали  MEMS motion sensor: ultra-stable three-axis digital output gyroscope
PDF  42 Pages
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производитель  STMICROELECTRONICS [STMicroelectronics]
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L3G4200D датащи(HTML) 36 Page - STMicroelectronics

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Register description
L3G4200D
36/42
Doc ID 17116 Rev 3
7.15
INT1_CFG (30h)
Configuration register for Interrupt source.
7.16
INT1_SRC (31h)
EMPTY
FIFO empty bit.
( 0: FIFO not empty; 1: FIFO empty)
FSS4-FSS1
FIFO stored data level
Table 47.
FIFO_SRC register description (continued)
Table 48.
INT1_CFG register
AND/OR
LIR
ZHIE
ZLIE
YHIE
YLIE
XHIE
XLIE
Table 49.
INT1_CFG description
AND/OR
AND/OR combination of Interrupt events. Default value: 0
(0: OR combination of interrupt events 1: AND combination of interrupt events
LIR
Latch Interrupt Request. Default value: 0
(0: interrupt request not latched; 1: interrupt request latched)
Cleared by reading INT1_SRC reg.
ZHIE
Enable interrupt generation on Z high event. Default value: 0
(0: disable interrupt request; 1: enable interrupt request on measured accel. value
higher than preset threshold)
ZLIE
Enable interrupt generation on Z low event. Default value: 0
(0: disable interrupt request; 1: enable interrupt request on measured accel. value
lower than preset threshold)
YHIE
Enable interrupt generation on Y high event. Default value: 0
(0: disable interrupt request; 1: enable interrupt request on measured accel. value
higher than preset threshold)
YLIE
Enable interrupt generation on Y low event. Default value: 0
(0: disable interrupt request; 1: enable interrupt request on measured accel. value
lower than preset threshold)
XHIE
Enable interrupt generation on X high event. Default value: 0
(0: disable interrupt request; 1: enable interrupt request on measured accel. value
higher than preset threshold)
XLIE
Enable interrupt generation on X low event. Default value: 0
(0: disable interrupt request; 1: enable interrupt request on measured accel. value
lower than preset threshold)
Table 50.
INT1_SRC register
0
IA
ZH
ZL
YHYLXHXL



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