ADP1874ARQZ-0.3-R7 datasheet(20/44 Pages) AD

20 / 44 page

ADP1874/ADP1875

Rev. 0 | Page 20 of 44

ON-BOARD LOW DROPOUT REGULATOR

The ADP1874/ADP1875 use an on-board LDO to bias the

internal digital and analog circuitry. Connect the VREG and

VREG_IN pins together for normal LDO operation for low

voltage internal block biasing (see Figure 67).

VREG_IN

REF

VREG

VIN

ON-BOARD REGULATOR

Figure 67. Connecting VREG and VREG_IN Together

With proper bypass capacitors connected to the VREG pin (output

of the internal LDO), this pin also provides power for the internal

MOSFET drivers. It is recommended to float VREG/VREG_IN

if VIN is used for greater than 5.5 V operation. The minimum

voltage where bias is guaranteed to operate is 2.75 V at VREG.

For applications where VIN is decoupled from VREG, the

minimum voltage at VIN must be 2.9 V. It is recommended to tie

VIN and VREG together if the VIN pin is subjected to a 2.75 V rail.

Table 5. Power Input and LDO Output Configurations

VIN

VREG/VREG_IN

Comments

>5.5 V

Float

Must use the LDO.

<5.5 V

Connect to VIN

LDO drop voltage is not

realized (that is, if VIN = 2.75 V,

then VREG = 2.75 V).

<5.5 V

Float

LDO drop is realized.

VIN Ranging

Above and

Below 5.5 V

Float

LDO drop is realized,

minimum VIN

recommendation is 2.95 V.

THERMAL SHUTDOWN

The thermal shutdown is a self-protection feature to prevent the

IC from damage due to a very high operating junction temperature.

If the junction temperature of the device exceeds 155°C, the part

enters the thermal shutdown state. In this state, the device shuts off

both the upper- and lower-side MOSFETs and disables the entire

controller immediately, thus reducing the power consumption of

the IC. The part resumes operation after the junction temperature

of the part cools to less than 140°C.

PROGRAMMING RESISTOR (RES) DETECT CIRCUIT

Upon startup, one of the first blocks to become active is the RES

detect circuit. This block powers up before soft start begins. It

forces a 0.4 V reference value at the RES pin (see Figure 68) and is

programmed to identify four possible resistor values: 47 kΩ, 22 kΩ,

open, and 100 kΩ.

The RES detect circuit digitizes the value of the resistor at the

RES pin (Pin 6). An internal ADC outputs a 2-bit digital code

that is used to program four separate gain configurations in the

current-sense amplifier (see Figure 69). Each configuration corre-

sponds to a current-sense gain (ACS) of 3 V/V, 6 V/V, 12 V/V, or

24 V/V, respectively (see Table 6 and Table 7). This variable is used

for the valley current-limit setting, which sets up the appropriate

current-sense gain for a given application and sets the compensation

necessary to achieve loop stability (see the Valley Current-Limit

Setting section and the Compensation Network section).

DRVH

DRVL

RES

CS GAIN

PROGRAMMING

Figure 68. Programming Resistor Location

PGND

CS GAIN

SET

AMP

ADC

RES

0.4V

Figure 69. RES Detect Circuit for Current-Sense Gain Programming

Table 6. Current-Sense Gain Programming

Resistor

ACS

47 kΩ

3 V/V

22 kΩ

6 V/V

Open

12 V/V

100 kΩ

24 V/V

VALLEY CURRENT-LIMIT SETTING

The architecture of the ADP1874/ADP1875 is based on valley

current-mode control. The current limit is determined by three

components: the RON of the lower-side MOSFET, the current-

sense amplifier output voltage swing, and the current-sense gain.

The CS output voltage range is internally fixed at 1.4 V. The

current-sense gain is programmable via an external resistor at

the RES pin (see the Programming Resistor (RES) Detect Circuit

section). The RON of the lower-side MOSFET can vary over

temperature and usually has a positive TC (meaning that it

increases with temperature); therefore, it is recommended to

program the current-sense gain resistor based on the rated RON

of the MOSFET at 125°C.

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