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MPC5675K датащи(PDF) 12 Page - Freescale Semiconductor, Inc |
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MPC5675K датащи(HTML) 12 Page - Freescale Semiconductor, Inc |
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12 / 140 page ![]() MPC5675K Microcontroller Data Sheet, Rev. 4 Preliminary—Subject to Change Without Notice Overview Freescale Semiconductor 12 — Modified SPI mode for interfacing to peripherals with longer setup time requirements • Support for up to 60 Mbit/s in Slave Only Rx mode 1.4.15 Serial communication interface module (LINFlex) The LINFlex on this device features the following: • Supports LIN Master mode, LIN Slave mode, and UART mode • LIN state machine compliant to LIN1.3, 2.0, and 2.1 specifications • Manages LIN frame transmission and reception without CPU intervention • LIN features — Autonomous LIN frame handling — Message buffer to store as many as 8 data bytes — Supports messages as long as 64 bytes — Detection and flagging of LIN errors (Sync field, delimiter, ID parity, bit framing, checksum and time-out errors) — Classic or extended checksum calculation — Configurable break duration of up to 36-bit times — Programmable baud rate prescalers (13-bit mantissa, 4-bit fractional) — Diagnostic features (Loop back, LIN bus stuck dominant detection) — Interrupt-driven operation with 16 interrupt sources • LIN slave mode features — Autonomous LIN header handling — Autonomous LIN response handling • UART mode — Full-duplex operation — Standard non return-to-zero (NRZ) mark/space format — Data buffers with 4-byte receive, 4-byte transmit — Configurable word length (8-bit, 9-bit, or 16-bit words) — Configurable parity scheme: none, odd, even, always 0 — Speed as fast as 2 Mbit/s — Error detection and flagging (parity, noise, and framing errors) — Interrupt-driven operation with four interrupt sources — Separate transmitter and receiver CPU interrupt sources — 16-bit programmable baud-rate modulus counter and 16-bit fractional — Two receiver wake-up methods • Support for DMA-enabled transfers |
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