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MPC5675K датащи(PDF) 98 Page - Freescale Semiconductor, Inc |
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MPC5675K датащи(HTML) 98 Page - Freescale Semiconductor, Inc |
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98 / 140 page ![]() MPC5675K Microcontroller Data Sheet, Rev. 4 Preliminary—Subject to Change Without Notice Electrical characteristics Freescale Semiconductor 98 3 VDD_HV_DRAM_VTT CC Termination voltage 1 —VDD_HV_DRAM_VREF × 0.05 VDD_HV_DRAM_VREF +0.05 V 4VIH CC Input high voltage —VDD_HV_DRAM_VREF + 0.20 —V 5VIL CC Input low voltage —VDD_HV_DRAM_VREF × 0.2 V 6VOH CC Output high voltage ODT enabled2 VDD_HV_DRAM_VTT +0.8 —V ODT disabled3 0.8 × VDD_HV_DRAM —V 7VOL CC Output low voltage ODT enabled2 —VDD_HV_DRAM_VTT × 0.8 V ODT disabled3 —VDD_HV_DRAM ×0.2 V NOTES: 1 BGA473: Termination voltage can be supplied via package pins. BGA257 Termination voltage internally tied as the BGA257 does not provide DRAM interface. Disable ODT 2 Termination voltage is supplied by V DD_HV_DRAM_VTT. 3 Tie V DD_HV_DRAM_VTT to VSS and disable ODT Table 49. Output drive current @ VDDE = 3.3 V (±10%) No. Pad Name Drive Mode Minimum IOH (mA) 1 Minimum IOL (mA) 2 1 DRAM ACC 111 –16 16 2 DRAM DQ 3 DRAM CLK NOTES: 1 I OH is defined as the current sourced by the pad to drive the output to VOH. 2 I OL is defined as the current sunk by the pad to drive the output to VOL. Table 50. DRAM pads AC electrical specifications (VDD_HV_DRAM = 3.3 V) No. Pad Name Prop. Delay (ns) L H/H L1 Output Slew rate Rise/Fall (V/ns) Drive Load (pF) Drive/Slew Rate Select MinMax MinMax MSB, LSB 1 DRAM ACC 1.4/1.4 2.4/2.4 3.1/2.5 5.6/5.4 5 111 1.7/1.7 2.7/2.7 0.9/1.1 1.7/2.0 20 111 2 DRAM DQ 1.4/1.4 2.4/2.4 3.1/2.5 5.6/5.4 5 111 1.7/1.7 2.7/2.7 0.9/1.1 1.7/2.0 20 111 3 DRAM CLK 1.4/1.4 2.4/2.4 3.1/2.5 5.7/5.7 5 111 1.6/1.6 2.6/2.6 1.1/1.3 2.3/2.3 20 111 Table 48. DRAM pads DC electrical specifications (VDD_HV_DRAM (continued) = 3.3 V) No. Symbol Parameter Condition Min Max Unit |
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