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MPC5675K датащи(PDF) 88 Page - Freescale Semiconductor, Inc

номер детали MPC5675K
подробное описание детали  Microcontroller is a 32-bit embedded controller designed for advanced
PDF  140 Pages
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производитель  FREESCALE [Freescale Semiconductor, Inc]
домашняя страница  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MPC5675K датащи(HTML) 88 Page - Freescale Semiconductor, Inc

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MPC5675K Microcontroller Data Sheet, Rev. 4
Preliminary—Subject to Change Without Notice
Electrical characteristics
Freescale Semiconductor
88
3.15.2
Read access timing
3.15.3
Write access timing
Table 27. Flash module life
No.
Symbol
Parameter
Condition
Value
Unit
Min
Typ1
NOTES:
1 Typical endurance is evaluated at 25 oC. Product qualification is performed to the minimum specification. For
additional information on the Freescale definition of Typical Endurance, please refer to Engineering Bulletin EB619,
Typical Endurance for Nonvolatile Memory.
Max
1a
P/E
CC Number of program/erase
cycles per block for over the
operating temperature range
(TJ)
16 KB blocks
100,000
cycles
1b
32 KB and 64 KB blocks
10,000 100,000
cycles
1c
128 KB blocks
1,000
100,000
cycles
2
Retention CC Minimum data retention at
85 °C average ambient
temperature2
2 Ambient temperature averaged over duration of application, not to exceed product operating temperature range.
Blocks with 0–1,000
P/E cycles
20
years
Blocks with 1,001–10,000
P/E cycles
10
years
Blocks with 10,001–100,000
P/E cycles
5—
years
Table 28. Code flash read access timing
No.
Symbol
Parameter
Condition
Value
Unit
Max
2fREAD
CC Maximum frequency for Flash reading
(system clock frequency SYS_CLK)
4 wait states
90
MHz
3
3 wait states
60
MHz
Table 29. Data flash read access timing
No.
Symbol
Parameter
Condition
Value
Unit
Max
2fREAD
CC Maximum frequency for Flash reading
(system clock frequency SYS_CLK)
12 wait states
90
MHz
3
8 wait states
60
MHz
Table 30. Code flash write access timing
No.
Symbol
Parameter
Condition
Value
Unit
Max
2fWRITE
CC Maximum frequency for Flash writing
(system clock frequency SYS_CLK)
TBD
90
MHz
3
TBD
60
MHz



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