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335 датащи(PDF) 30 Page - Intel Corporation |
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335 датащи(HTML) 30 Page - Intel Corporation |
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30 / 82 page ![]() 30 Datasheet Electrical Specifications 2.13 GTL+ FSB Specifications Termination resistors are not required for most GTL+ signals; they are integrated into the processor silicon. Valid high and low levels are determined by the input buffers that compare a signal’s voltage with a reference voltage called GTLREF. Table 2-18 lists the GTLREF specifications. The GTL+ reference voltage (GTLREF) should be generated on the system board using high precision voltage divider circuits. § Table 2-18. GTL+ Bus Voltage Definitions Symbol Parameter Min Typ Max Units Notes1 NOTES: 1. Unless otherwise noted, all specifications in this table apply to all processor frequencies. GTLREF_compatible Bus Reference Voltage 0.98 * (2/3 VCC)2/3 VCC 1.02 * (2/3 VCC)V 2,3,4,5 2. The tolerances for this specification have been stated generically to enable the system designer to calculate the mini- mum and maximum values across the range of VCC. 3. GTLREF should be generated from VCC by a voltage divider of 1% resistors or 1% matched resistors. 4. The VCC referred to in these specifications is the instantaneous VCC. 5. These specifications are different depending on whether the platform is forward compatible to the Celeron D processor or if it is optimized for the Celeron D processor. A compatible platform is one that is designed for a previous generation processor but has some level of compatibility with the Celeron D processor. An optimized platform is one designed spe- cifically for the Celeron D processor; however, it may have some level of compatibility with previous generation proces- sors. GTLREF_optimized Bus Reference Voltage (0.98 * 0.63) * VCC 0.63 * VCC (1.02 * 0.63) * VCC V 2,3,4,5 R_pullup On die pull-up for BOOTSELECT and OPTIMIZED/ COMPAT# pins 500 — 5000 Ω 5,6 6. These pull-ups are to the internal VCCVID supply. R TT _compatible Termination Resistance 45 50 55 Ω 5,7 7. RTT is the on-die termination resistance measured at VCC/2 of the GTL+ output driver. R TT _optimized Termination Resistance 54 60 66 Ω 5 COMP[1:0]_compatible COMP Resistance 49.4 49.9 50.4 Ω 5,8 8. COMP resistance must be provided on the system board with 1% resistors. COMP[1:0]_optimized COMP Resistance 61.3 61.9 62.5 Ω 5,8 |
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