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DSM2180F3 датащи(PDF) 17 Page - STMicroelectronics |
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DSM2180F3 датащи(HTML) 17 Page - STMicroelectronics |
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17 / 63 page ![]() Obsolete Product(s) - Obsolete Product(s) 17/63 DSM2180F3 RUNTIME CONTROL REGISTER DEFINITION There are up to 256 addresses decoded inside the DSM device for control and status information. 27 of these locations contain registers that the DSP can access at runtime. The base address of this block of 256 locations is referred to in this manual as csiop (Chip Select I/O Port). Table 4 lists the 27 registers and their offsets (in hex) from the csiop base address needed to access individual DSM control and status registers. The DSP will access these registers in I/O memory space using its IOMS strobe. These registers are accesses in bytes, so the DSP should ignore the upper byte of its 16-bit I/O access. Note1: All csiop registers are cleared to logic 0 at reset. Note2: Do not write to unused locations within the csiop block of 256 registers. They should remain logic zero. Table 4. CSIOP Registers and their Offsets (in hex) Register Name Port B Port C Port D Other Description Data In 01 10 11 MCUI/O input mode. Read to obtain current logic level of Port pins. No writes. Data Out 05 12 13 MCU I/O output mode. Write to set logic level on Port pins. Read to check status. Direction 07 14 15 MCU I/O mode. Configures Port pin as input or output. Write to set direction of Port pins. Logic 1 = out, Logic 0 = in. Read to check status. Drive Select 09 16 17 Write to configure Port pins as either standard CMOS or Open Drain on some pins, while selecting high slew rate on other pins. Read to check status. Input Macrocells 0B 18 Read to obtain state of IMCs. No writes. Enable Out 0D 1A 1B Read to obtain the status of the output enable logic on each I/O Port driver. No writes. Output Macrocells AB 20 Read to get logic state of output of OMC bank AB. Write to load registers of OMC bank AB. Output Macrocells BC 21 Read to get logic state of output of OMC bank BC. Write to load registers of OMC bank BC. Mask Macrocells AB 22 Write to set mask for loading OMCs in bank AB. A logic 1 in a bit position will block reads/writes of the corresponding OMC. A logic 0 will pass OMC value. Read to check status. Mask Macrocells BC 23 Write to set mask for loading OMCs in bank BC. A logic 1 in a bit position will block reads/writes of the corresponding OMC. A logic 0 will pass OMC value. Read to check status. Flash Sector Protect C0 Read to determine Flash Sector Protection Setting. No writes. Security Bit C2 Read to determine if DSM devices Security Bit is active. Logic 1 = device secured. No writes. JTAG Enable C7 Write to enable JTAG Pins (optional feature). Read to check status. PMMR0 B0 Power Management Register 0. Write and read. PMMR2 B4 Power Management Register 2. Write and read. Page E0 Memory Page Register. Write and read. |
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