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VND670SP датащи(PDF) 14 Page - STMicroelectronics |
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VND670SP датащи(HTML) 14 Page - STMicroelectronics |
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14 / 20 page ![]() Application information VND670SP 14/20 Figure 9. Waveforms (1) Table 13. Electrical transient requirements ISO T/R 7637/1 Test pulse Test level I II III IV Delays and impedance 1- 25V(1) 1. All functions of the device are performed as designed after exposure to disturbance. - 50V(1) - 75V(1) - 100V(1) 2ms, 10 Ω 2 + 25V(1) + 50V(1) + 75V(1) + 100V(1) 0.2ms, 10 Ω 3a - 25V(1) - 50V(1) - 100V(1) - 150V(1) 0.1µs, 50 Ω 3b + 25V(1) + 50V(1) + 75V(1) + 100V(1) 0.1µs, 50 Ω 4- 4V(1) - 5V(1) - 6V(1) - 7V(1) 100ms, 0.01 Ω 5+ 26.5V(1) + 46.5V(2) 2. One or more functions of the device is not performed as designed after exposure and cannot be returned to proper operation without replacing the device. + 66.5V(2) + 86.5V(2) 400ms, 2 Ω normal operation OUTA shorted to VCC normal operation undervoltage shutdown INA INB OUTA OUTB GATEA GATEB DIAGB/ENB DIAGA/ENA OUTA shorted to VCC and undervoltage shutdown Load disconnection test (INA=1, PWM=-2V) load connected INA INB OUTA OUTB GATEA GATEB DIAGB/ENB DIAGA/ENA PWM (test mode) load disconnected load connected back |
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