xxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxx x x x xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxx xx xx

xxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxx xxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxx x x

xxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxx

xxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxx xxx

x = data bit unchanged.

001aaj646

a c

b DP f

egd

MSB

LSB

b DP c a d gfe

MSB

LSB

a bfg e c d DP

MSB

LSB

c b a

f

ged DP

MSB

LSB

drive mode

static

1:2

multiplex

1:3

multiplex

1:4

multiplex

LCD segments

LCD backplanes

display RAM filling order

transmitted display byte

BP0

BP0

BP1

BP0

BP1

BP2

BP1

BP2

BP3

BP0

n

c

x

x

x

0

1

2

3

b

x

x

x

a

x

x

x

f

x

x

x

g

x

x

x

e

x

x

x

d

x

x

x

DP

x

x

x

n + 1

n + 2

n + 3

n + 4

n + 5

n + 6

n + 7

display RAM

bits (rows)/

backplane

outputs (BP)

byte1

display RAM addresses (columns)/segment outputs (S)

n

a

b

x

x

0

1

2

3

f

g

x

x

e

c

x

x

d

DP

x

x

n + 1

n + 2

n + 3

byte1

byte2

display RAM

bits (rows)/

backplane

outputs (BP)

display RAM addresses (columns)/segment outputs (S)

n

b

DP

c

x

0

1

2

3

a

d

g

x

f

e

x

x

n + 1

n + 2

byte1

byte2

byte3

display RAM

bits (rows)/

backplane

outputs (BP)

display RAM addresses (columns)/segment outputs (S)

n + 1

n

a

c

b

DP

0

1

2

3

f

e

g

d

byte1

byte2

byte3

byte4

byte5

display RAM

bits (rows)/

backplane

outputs (BP)

display RAM addresses (columns)/segment outputs (S)

DP

a

f

b

g

e

c

d

DP

a

f

b

g

e

c

d

DP

a

f

b

g

e

c

d

DP

a

f

b

g

e

c

d