HAL855UT-K datasheet(10/42 Pages) MICRONAS

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HAL855

DATA SHEET

Nov. 26, 2008; DSH000149_003EN

Micronas

Mode

The MODE register consists of four “sub”-registers

defining the magnetic and output behavior of the sen-

sor. The RANGE bits are the three lowest bits of the

MODE register; they define the magnetic field range of

the A/D converter. The next three bits (FILTER) define

the

−3 dB frequency of the digital low pass filter. The

next sub-register is the FORMAT register, and it

defines the different output formats as described

below. This sub-register also consists of 3 bits. The

last three MSBs define the OUTPUT PERIOD of the

PWM signal.

Range

Filter

Output Format

The HAL855 provides two different output formats: a

PWM and Biphase-M output.

PMW output is a pulse width modulated output. The

signal is defined by the ratio of pulse width to pulse

period.

The Biphase-M output is a serial protocol. A logical “0”

is coded as no output level change within the bit time.

A logical “1” is coded as an output level change

between 50% and 80% of the bit time. After each bit,

an output level change occurs (see Section 3.6.1. on

page 24).

Output Period

The OUTPUT PERIOD register defines the PWM

period of the output signal.

Table 2–1: RANGE register definition

Magnetic Field Range

Bit Setting

−30 mT...30 mT

−40 mT...40 mT

−60 mT...60 mT

−75 mT...75 mT

−80 mT...80 mT

−90 mT...90 mT

−100 mT...100 mT

−150 mT...150 mT

Table 2–2: FILTER register definition

−3 dB Frequency

Bit Setting

80 Hz

160 Hz

500 Hz

1kHz

2kHz

Table 2–3: OUTPUT FORMAT register definition

Output Format

Bit Setting

PWM

Biphase-M

41)

Biphase-M (test)

52)

1) In case of OUTPUT FORMAT = 4 the continuous

Biphase-M output will be active after locking the

device. In order to test the Biphase-M output with

non-locked sensors OUTPUT FORMAT = 5 has

to be used.

2) writing OUTPUT FORMAT = 5 will activate the

Biphase-M output for test purpose. The test can

be deactivated by switching the device off.

Table 2–4: OUTPUT PERIOD register definition

PWM Output Period

Bit Setting

128 ms; 12-bit resolution

64 ms; 12-bit resolution

32 ms; 12-bit resolution

16 ms; 12-bit resolution

8 ms; 12-bit resolution

4 ms; 11-bit resolution

2 ms; 10-bit resolution

1 ms; 9-bit resolution

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