WM8148 datasheet(17/43 Pages) WOLFSON

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WM8148

Production Data

WOLFSON MICROELECTRONICS LTD

PD Rev 4.0 April 1999

RESET LEVEL CLAMPING (RLC)

If the sensor output voltage is within the input range of the WM8148, the sensor may be d.c. coupled

into the WM8148 either directly or via a buffer. If the output from the sensor is outside the input range

of the WM8148, the signal has to be connected via a capacitor, CIN, and the d.c. bias conditions must

be defined on the WM8148 side of the capacitor (at RINP).

Setting of the d.c. bias conditions is best performed by Reset-Level Clamping, activated by pin RLC.

Reset-Level Clamping is compatible with both CDS and non-CDS operating modes. A typical

configuration is shown in Figure 16.

TIMING CONTROL

S/H

4-BIT

RLC DAC

TO OFFSET DAC

RLC

CDS

FROM CONTROL

INTERFACE

S/H

FROM CONTROL

INTERFACE

MCLK

VSMP

RLC

INPUT SAMPLING

BLOCK FOR RED

CHANNEL

MODE[0]

RINP

VRLC

EXTERNAL VRLC

Figure 16 Reset-Level Clamping Circuitry

When the clamp pulse, CL, is active, the voltage on the WM8148 side of CIN, at RINP, will be forced

equal to the VRLC voltage, VVRLC, by switch 1. When the CL pulse turns off, the RINP voltage will

initially remain at VVRLC, but any subsequent variation in sensor voltage appearing at the sensor side

of CIN will couple through CIN to RINP. Switch 2 determines whether the RS level is taken from the

incoming signal (CDS operation) or the VRLC pin (non-CDS operation).

Figure 17 demonstrates the case of a typical CCD waveform, with CL applied during the reset period.

MCLK

VSMP

RLC

Input Video

r,g,b

RLC on this pixel

No RLC on this pixel

Programmable Delay

Figure 17 Relationship of RLC pin, MCLK and VSMP to Internal Clamp Pulse, CL

The input signal applied to the RLC pin is sampled on the positive edge of MCLK that occurs during

each VSMP pulse. The sampled level, high (or low) controls the presence (or absence) of the internal

CL pulse on the next reset level. The position and duration of CL is adjustable by control bits

RESREF[3:0] and SMALL.

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