HT95R64 datasheet(28/82 Pages) HOLTEK

28 / 82 page

HT95R64/HT95R65

Rev. 1.00

March 3, 2010

Serial Interface Function

The device contains a Serial Interface Function, which

includes both the four line SPI interface and the two line

2C interface types, to allow an easy method of commu-

nication with external peripheral hardware. Having rela-

tively simple communication protocols, these serial

interface types allow the microcontroller to interface to

external SPI or I

2C based hardware such as sensors,

Flash or EEPROM memory, etc. The SIM interface pins

are pin-shared with other I/O pins therefore the SIM in-

terface function must first be selected using a configura-

tion option. As both interface types share the same pins

and registers, the choice of whether the SPI or I

2C type

is used is made using a bit in an internal register.

SPI Interface

The SPI interface is often used to communicate with ex-

ternal peripheral devices such as sensors, Flash or

EEPROM memory devices etc. Originally developed by

Motorola, the four line SPI interface is a synchronous

serial data interface that has a relatively simple commu-

nication protocol simplifying the programming require-

ments when communicating with external hardware

devices.

The communication is full duplex and operates as a

slave/master type, where the MCU can be either master

or slave. Although the SPI interface specification can

control multiple slave devices from a single master,

here, as only a single select pin, SCS, is provided only

one slave device can be connected to the SPI bus.

· SPI Interface Operation

The SPI interface is a full duplex synchronous serial

data link. It is a four line interface with pin names SDI,

SDO, SCK and SCS. Pins SDI and SDO are the Serial

Data Input and Serial Data Output lines, SCK is the

Serial Clock line and SCS is the Slave Select line. As

the SPI interface pins are pin-shared with normal I/O

pins and with the I

2C function pins, the SPI interface

must first be enabled by selecting the SIM enable con-

figuration option and setting the correct bits in the

SIMCTL0/SIMCTL2 register. After the SPI configura-

tion option has been configured it can also be addi-

tionally disabled or enabled using the SIMEN bit in the

SIMCTL0 register. Communication between devices

connected to the SPI interface is carried out in a

slave/master mode with all data transfer initiations be-

ing implemented by the master. The Master also con-

trols the clock signal. As the device only contains a

single SCS pin only one slave device can be utilised.

The SPI function in this device offers the following fea-

tures:

¨ Full duplex synchronous data transfer

¨ Both Master and Slave modes

¨ LSB first or MSB first data transmission modes

¨ Transmission complete flag

¨ Rising or falling active clock edge

¨ WCOL and CSEN bit enabled or disable select

The status of the SPI interface pins is determined by a

number of factors such as whether the device is in the

master or slave mode and upon the condition of cer-

tain control bits such as CSEN, SIMEN and SCS.In

the table I, Z represents an input floating condition.

There are several configuration options associated

with the SPI interface. One of these is to enable the

SIM function which selects the SIM pins rather than

normal I/O pins. Note that if the configuration option

does not select the SIM function then the SIMEN bit in

the SIMCTL0 register will have no effect. Another two

SIM configuration options determine if the CSEN and

WCOL bits are to be used.

Configuration Option

Function

SIM Function

SIM interface or I/O pins

SPI CSEN bit

Enable/Disable

SPI WCOL bit

Enable/Disable

SPI Interface Configuration Options

SPI Registers

There are three internal registers which control the over-

all operation of the SPI interface. These are the SIMDR

data register and two control registers SIMCTL0 and

SIMCTL2. Note that the SIMCTL1 register is only used

by the I

2C interface.

S P I M a s t e r

S P I S l a v e

S C K

S D O

S D I

S C S

S C K

S D I

S D O

S C S

SPI Master/Slave Connection

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