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ATmega328P датащи(PDF) 59 Page - ATMEL Corporation |
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ATmega328P датащи(HTML) 59 Page - ATMEL Corporation |
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59 / 345 page ![]() 59 7810A–AVR–11/09 ATmega328P [Preliminary] 0x3C04 jmp EXT_INT1 ; IRQ1 Handler ... ... ... ; 0x3C32 jmp SPM_RDY ; Store Program Memory Ready Handler ; 0x3C33 RESET: ldi r16,high(RAMEND); Main program start 0x3C34 out SPH,r16 ; Set Stack Pointer to top of RAM 0x3C35 ldi r16,low(RAMEND) 0x3C36 out SPL,r16 0x3C37 sei ; Enable interrupts 0x3C38 <instr> xxx 11.2 Register Description 11.2.1 Moving Interrupts Between Application and Boot Space, ATmega88P, ATmega168P and ATmega328P The MCU Control Register controls the placement of the Interrupt Vector table. 11.2.2 MCUCR – MCU Control Register • Bit 1 – IVSEL: Interrupt Vector Select When the IVSEL bit is cleared (zero), the Interrupt Vectors are placed at the start of the Flash memory. When this bit is set (one), the Interrupt Vectors are moved to the beginning of the Boot Loader section of the Flash. The actual address of the start of the Boot Flash Section is deter- mined by the BOOTSZ Fuses. Refer to the section “Boot Loader Support – Read-While-Write Self-Programming, ATmega88P, ATmega168P and ATmega328P” on page 271 for details. To avoid unintentional changes of Interrupt Vector tables, a special write procedure must be fol- lowed to change the IVSEL bit: a. Write the Interrupt Vector Change Enable (IVCE) bit to one. b. Within four cycles, write the desired value to IVSEL while writing a zero to IVCE. Interrupts will automatically be disabled while this sequence is executed. Interrupts are disabled in the cycle IVCE is set, and they remain disabled until after the instruction following the write to IVSEL. If IVSEL is not written, interrupts remain disabled for four cycles. The I-bit in the Status Register is unaffected by the automatic disabling. Note: If Interrupt Vectors are placed in the Boot Loader section and Boot Lock bit BLB02 is programmed, interrupts are disabled while executing from the Application section. If Interrupt Vectors are placed in the Application section and Boot Lock bit BLB12 is programed, interrupts are disabled while executing from the Boot Loader section. Refer to the section “Boot Loader Support – Read-While-Write Self-Programming, ATmega88P, ATmega168P and ATmega328P” on page 271 for details on Boot Lock bits. This bit is not available in ATmega328P. • Bit 0 – IVCE: Interrupt Vector Change Enable Bit 7654 3210 0x35 (0x55) – BODS BODSE PUD – – IVSEL IVCE MCUCR Read/Write R R R R/W R R R/W R/W Initial Value 0000 0000 |
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