ATmega328P datasheet(42/345 Pages) ATMEL

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7810A–AVR–11/09

ATmega328P [Preliminary]

9.11

9.11.1

SMCR – Sleep Mode Control Register

The Sleep Mode Control Register contains control bits for power management.

• Bits 7..4 Res: Reserved Bits

These bits are unused bits in the ATmega328P, and will always read as zero.

• Bits 3..1 – SM2..0: Sleep Mode Select Bits 2, 1, and 0

These bits select between the five available sleep modes as shown in Table 9-2.

Note:

1. Standby mode is only recommended for use with external crystals or resonators.

• Bit 0 – SE: Sleep Enable

The SE bit must be written to logic one to make the MCU enter the sleep mode when the SLEEP

instruction is executed. To avoid the MCU entering the sleep mode unless it is the programmer’s

purpose, it is recommended to write the Sleep Enable (SE) bit to one just before the execution of

the SLEEP instruction and to clear it immediately after waking up.

9.11.2

MCUCR – MCU Control Register

• Bit 6 – BODS: BOD Sleep

The BODS bit must be written to logic one in order to turn off BOD during sleep, see Table 9-1

on page 37. Writing to the BODS bit is controlled by a timed sequence and an enable bit,

BODSE in MCUCR. To disable BOD in relevant sleep modes, both BODS and BODSE must first

be set to one. Then, to set the BODS bit, BODS must be set to one and BODSE must be set to

zero within four clock cycles.

Bit

0x33 (0x53)

––

SM2

SM1

SM0

SMCR

Read/Write

R/W

Initial Value

Table 9-2.

Sleep Mode Select

SM2

SM1

SM0

Sleep Mode

000

Idle

ADC Noise Reduction

010

Power-down

011

Power-save

100

Reserved

101

Reserved

Standby(1)

External Standby(1)

Bit

0x35 (0x55)

–BODS

BODSE

PUD

–

IVSEL

IVCE

MCUCR

Read/Write

R/W

Initial Value

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