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ATmega328P датащи(PDF) 33 Page - ATMEL Corporation |
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ATmega328P датащи(HTML) 33 Page - ATMEL Corporation |
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33 / 345 page ![]() 33 7810A–AVR–11/09 ATmega328P [Preliminary] When this clock source is selected, start-up times are determined by the SUT Fuses as shown in Table 8-13. Note: 1. If the RSTDISBL fuse is programmed, this start-up time will be increased to 14CK + 4.1 ms to ensure programming mode can be entered. 8.8 External Clock To drive the device from an external clock source, XTAL1 should be driven as shown in Figure 8-4 on page 33. To run the device on an external clock, the CKSEL Fuses must be programmed to “0000” (see Table 8-14). Figure 8-4. External Clock Drive Configuration When this clock source is selected, start-up times are determined by the SUT Fuses as shown in Table 8-15. Table 8-13. Start-up Times for the 128 kHz Internal Oscillator Power Conditions Start-up Time from Power-down and Power-save Additional Delay from Reset SUT1..0 BOD enabled 6 CK 14CK(1) 00 Fast rising power 6 CK 14CK + 4 ms 01 Slowly rising power 6 CK 14CK + 64 ms 10 Reserved 11 Table 8-14. Crystal Oscillator Clock Frequency Frequency CKSEL3..0 0 - 16 MHz 0000 Table 8-15. Start-up Times for the External Clock Selection Power Conditions Start-up Time from Power-down and Power-save Additional Delay from Reset (VCC = 5.0V) SUT1..0 BOD enabled 6 CK 14CK 00 Fast rising power 6 CK 14CK + 4.1 ms 01 Slowly rising power 6 CK 14CK + 65 ms 10 Reserved 11 NC EXTERNAL CLOCK SIGNAL XTAL2 XTAL1 GND |
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