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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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MPC5604B датащи(PDF) 59 Page - Freescale Semiconductor, Inc |
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MPC5604B датащи(HTML) 59 Page - Freescale Semiconductor, Inc |
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59 / 72 page  Electrical characteristics MPC5604B/C Microcontroller Data Sheet, Rev. 4 Freescale Semiconductor 59 2 Analog and digital V SS must be common (to be tied together externally). 3 V AINx may exceed VSS_ADC and VDD_ADC limits, remaining on absolute maximum ratings, but the results of the conversion will be clamped respectively to 0x000 or 0x3FF. 4 Duty cycle is ensured by using system clock without prescaling. When ADCLKSEL = 0, the duty cycle is ensured by internal divider by 2. 5 During the sample time the input capacitance C S can be charged/discharged by the external source. The internal resistance of the analog source must allow the capacitance to reach its final voltage level within tADC_S. After the end of the sample time tADC_S, changes of the analog input voltage have no effect on the conversion result. Values for the sample clock tADC_S depend on programming. 6 This parameter does not include the sample time t ADC_S, but only the time for determining the digital result and the time to load the result’s register with the conversion result. 7 Total Unadjusted Error: The maximum error that occurs without adjusting Offset and Gain errors. This error is a combination of Offset, Gain and Integral Linearity errors. |
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