TVP3703

VIDEO INTERFACE PALETTE

TRUE-COLOR CMOS RAMDAC

SLAS100 – MARCH 1996

4

POST OFFICE BOX 655303

DAC interface

TERMINAL

I/O

DESCRIPTION

NAME

NO.

I/O

DESCRIPTION

RED,

GREEN,

BLUE

38 – 40

O

DAC video outputs. These signals are designed to drive a doubly terminated 75-

Ω load.

REF

51

I

External 1.235-V reference voltage. An external bypass capacitor should be connected from REF to GND.

RSET

48

I

A precision resistor placed between RSET and GND sets the full-scale DAC current. The required resistor value

can be calculated from:

where Vref is the external or internal reference voltage and IO is the required DAC full-scale output current. Rset

is typically 147

Ω for VGA (see application information section).

COMP

49

I

External compensation capacitor connection for DACs.

SENSE

68

O

Sense out. SENSE is a logical 0 if one or more of the DAC outputs exceeds the internal DAC comparator trip

voltage (which is midway between the DAC full scale and GND potentials).

frequency synthesizer interface

TERMINAL

I/O

DESCRIPTION

NAME

NO.

I/O

DESCRIPTION

XOUT

6

O

Crystal output and input connections. A series-resonant crystal must be connected between XOUT and XIN

XIN

7

I

to provide the reference clock for the PLLs.

VCLK

9

O

Video clock PLL out

MCLK

61

O

Memory clock PLL out

power supply

TERMINAL

I/O

DESCRIPTION

NAME

NO.

I/O

DESCRIPTION

VDD

8, 27, 35,

62

Digital power

AVDD

3, 42

Analog power for the DACs and PLL.

GND

2, 10, 36,

37, 41, 60

Common ground rail for all circuitry.

NC

26, 28 – 34

No internal connection. For future upgrade to a 24-bit pixel port the controller. Outputs P16–P23 can be routed

to terminals 26, 28 – 34 respectively.

detailed description

micro port

The TVP3703 micro port (see Table 1) is an extension of the standard VGA micro port and powers up with a

register configuration compatible with standard and high-color VGA. There are two methods for accessing the

register set of the TVP3703 – direct register space (RS) access and indirect access.

direct RS access

This feature supports direct RS mapping to eight address locations that access the VGA color palette, pixel

command register, and an indexed register. The index low/high registers increment after every access to the

indexed register.

Rset (W) +

2.1

V

ref

I

O