THS0842

DUAL-INPUT, 8-BIT, 40 MSPS LOW-POWER ANALOG-TO-DIGITAL CONVERTER

WITH SINGLE OR DUAL PARALLEL BUS OUTPUT

SLAS246 – DECEMBER 1999

24

POST OFFICE BOX 655303

PRINCIPLES OF OPERATION

dc coupled input

C

THS0842

+

–

CML

R

AIN+

R

R

R

VIN

AIN–

REFT

REFB

C

THS0842

CML

AIN–

VIN

AIN+

REFT

REFB

Figure 24. DC-Coupled Input Circuits

For dc-coupled systems, an op-amp can level shift a ground referenced input signal. A circuit like Figure 27

reference terminals

The THS0842 input voltage range is determined by the voltages on terminals REFBI and REFTI. Since the

device has an internal voltage reference generator, it must be placed in power down before applying an external

voltage to the REFT and REFB pins. Especially at higher sampling rates, it is advantageous to have a wider

These voltages should not be derived via a voltage divider from a power supply source. Instead, use a

bandgap-derived voltage reference to derive both references via an op-amp circuit. Refer to the schematic of

the THS0842 evaluation module in this datasheet for an example circuit.

When using external references, the full-scale ADC input range and its dc position can be adjusted. The

as shown in the specification section. Next to the constraint on their difference, there are limitations on the useful

Table 1 summarizes these limits for 3 cases.

Table 1. Min/Max Reference Input Levels

AVDD

VREFB(min)

VREFB(max)

VREFT(min)

VREFT(max)

[VREFT–VREFB]max

3 V

0.8 V

1.2 V

1.8 V

2.2 V

1 V

3.3 V

0.8 V

1.2 V

2.1 V

2.5 V

1.3 V

3.6 V

0.8 V

1.2 V

2.4 V

2.8 V

1.6 V