ADS7882

Table 2. Conversion Data Read Out

DATA READ OUT

BYTE

DB11–DB4

DB3–DB0

High

D3–D0, 0000

All zeroes

Low

D11–D4

D3–D0

Also refer to the DATA READ and DEVICE OPERATION AND DATA READ IN BACK-TO-BACK CONVERSION

sections for more details.

Reset

Refer to the POWERDOWN/RESET section for the device reset sequence.

It is recommended to reset the device after power on. A reset can be issued once the power has reached 95% of

its final value.

PWD/RST is an asynchronous active low input signal. A current conversion is aborted no later than 45 ns after

the converter is in the reset mode. In addition, the device outputs a FE0 code to indicate a reset condition. The

converter returns back to normal operation mode immediately after the PWD/RST input is brought high.

Data is not valid for the first four conversions after a device reset.

Powerdown

Refer to the POWERDOWN/RESET section for the device powerdown sequence.

brought high.

After this period, normal conversion and sampling operation can be started as discussed in previous sections.

Data is not valid for the first four conversions after a device reset.

Nap Mode

Refer to the NAP MODE section in the DESCRIPTION AND TIMING DIAGRAMS section for information.

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