поискавой системы для электроныых деталей
  Russian  ▼
ALLDATASHEETRU.COM

X  

SH7018 датащи(PDF) 32 Page - Renesas Technology Corp

номер детали SH7018
подробное описание детали  SuperH??RISC engine
PDF  431 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
производитель  RENESAS [Renesas Technology Corp]
домашняя страница  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

SH7018 датащи(HTML) 32 Page - Renesas Technology Corp

Back Button SH7018 Datasheet HTML 28Page - Renesas Technology Corp SH7018 Datasheet HTML 29Page - Renesas Technology Corp SH7018 Datasheet HTML 30Page - Renesas Technology Corp SH7018 Datasheet HTML 31Page - Renesas Technology Corp SH7018 Datasheet HTML 32Page - Renesas Technology Corp SH7018 Datasheet HTML 33Page - Renesas Technology Corp SH7018 Datasheet HTML 34Page - Renesas Technology Corp SH7018 Datasheet HTML 35Page - Renesas Technology Corp SH7018 Datasheet HTML 36Page - Renesas Technology Corp Next Button
Zoom Inzoom in Zoom Outzoom out
 32 / 431 page
background image
16
Table 2.3
Delayed Branch Instructions
SH7018 CPU
Description
Example of Conventional CPU
BRA
TRGET
ADD
R1,R0
Executes an ADD before
branching to TRGET
ADD.W
R1,R0
BRA
TRGET
Multiplication/Accumulation Operation: 16-bit
× 16-bit → 32-bit multiplication operations are
executed in one to two cycles. 16-bit
× 16-bit + 64-bit → 64-bit multiplication/accumulation
operations are executed in two to three cycles. 32-bit
× 32-bit → 64-bit and 32-bit × 32-bit + 64-
bit
→ 64-bit multiplication/accumulation operations are executed in two to four cycles.
T Bit: The T bit in the status register changes according to the result of the comparison, and in
turn is the condition (true/false) that determines if the program will branch. The number of
instructions that change the T bit is kept to a minimum to improve the processing speed (table
2.4).
Table 2.4
T Bit
SH7018 CPU
Description
Example of Conventional CPU
CMP/GE
R1,R0
BT
TRGET0
BF
TRGET1
T bit is set when R0
≥ R1. The
program branches to TRGET0
when R0
≥ R1 and to TRGET1
when R0 < R1.
CMP.W
R1,R0
BGE
TRGET0
BLT
TRGET1
ADD
#1,R0
CMP/EQ
#0,R0
BT
TRGET
T bit is not changed by ADD. T bit is
set when R0 = 0. The program
branches if R0 = 0.
SUB.W
#1,R0
BEQ
TRGET
Immediate Data: Byte (8-bit) immediate data resides in instruction code. Word or longword
immediate data is not input via instruction codes but is stored in a memory table. An immediate
data transfer instruction (MOV) accesses the memory table using the PC relative addressing mode
with displacement (table 2.5).



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


датащи скачать

Go To PDF Page


ссылки URL



Вашему бизинису помогли Аллдатащит?  [ DONATE ] 

Что такое Аллдатащит   |   реклама   |   контакт   |   Конфиденциальность   |   Ссылка на техническое описание    |   обмен ссыками   |   поиск по производителю
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com