SH7018 datasheet(55/431 Pages) RENESAS

55 / 431 page

In the case of an interrupt or the like, the SP is accessed and the PC and status register (SR) are

saved to the stack area. The exception service routine start address is fetched from the exception

processing vector table. The CPU then branches to that address and execution of the program

begins.

The processing state which follows is the program execution state.

Program Execution State: In this state the CPU executes programs sequentially.

Power-Down State: In this state CPU operation halts in order to consume less power. The SLEEP

instruction causes the CPU to enter the power-down state. This state has two modes, the sleep

mode and the standby mode.

2.5.2

Power-Down State

The power-down state is one of the CPU’s processing states. In this state CPU operation halts, in

addition to the execution of programs, and power consumption is reduced. It has two modes, the

sleep mode and the standby mode.

Sleep Mode: Issuing the SLEEP instruction when the standby bit (SBY) of standby control

operation is halted, but data stored in the CPU’s internal registers and in on-chip RAM is retained.

The functions of on-chip peripheral modules other than the CPU do not halt.

A power-on reset or any interrupt causes the CPU to recover from the sleep mode. Exception

processing then takes place, after which the CPU enters the normal program execution mode.

Standby Mode: Issuing the SLEEP instruction when SBY of SBYCR is set to 1 causes the CPU

to enter the standby mode. In the standby mode the functioning of the CPU, on-chip peripheral

modules, and oscillator are halted. If the chip enters the standby mode while a multiplier

instruction is executing, the MACH and MACL values become uncertain.

A power-on reset or NMI interrupt causes the chip to recover from the sleep mode. After a reset

the oscillator stabilization time elapses, after which exception processing takes place and then the

chip enters the normal program execution mode. In the case of an NMI interrupt, the oscillator

stabilization time must elapse, after which exception processing takes place and then the chip

enters the normal program execution mode.

This mode halts the operation of the oscillator, so power consumption is decreased substantially.

SH7018 датащи(PDF) 55 Page - Renesas Technology Corp