SH7018 datasheet(12/431 Pages) RENESAS

12 / 431 page

12.1.3 Pin Configuration ................................................................................................. 202

12.1.4 Register Configuration ......................................................................................... 203

12.2

Register Descriptions......................................................................................................... 203

12.2.1 Receive Shift Register (RSR1) ............................................................................. 203

12.2.2 Receive Data Register (RDR1) ............................................................................ 203

12.2.3 Transmit Shift Register (TSR1)............................................................................ 204

12.2.4 Transmit Data Register (TDR1) .......................................................................... 204

12.2.5 Serial Mode Register (SMR1).............................................................................. 204

12.2.6 Serial Control Register (SCR1)............................................................................ 207

12.2.7 Serial Status Register (SSR1) ............................................................................... 210

12.2.8 Bit Rate Register (BRR1) ..................................................................................... 214

12.3

Operation ........................................................................................................................... 225

12.3.1 Overview .............................................................................................................. 225

12.3.2 Operation in Asynchronous Mode........................................................................ 227

12.3.3 Multiprocessor Communication ........................................................................... 237

12.3.4 Clock Synchronous Operation.............................................................................. 245

12.4

Interrupt ............................................................................................................................. 255

12.5

Notes on Use...................................................................................................................... 256

Section 13 A/D Converter (A/D)..................................................................................... 259

13.1

Overview............................................................................................................................ 259

13.1.1 Features ................................................................................................................ 259

13.1.2 Block Diagram...................................................................................................... 260

13.1.3 Pin Configuration ................................................................................................. 261

13.1.4 Register Configuration ......................................................................................... 262

13.2

Register Descriptions......................................................................................................... 262

13.2.1 A/D Data Registers A to D (ADDRA to ADDRD).............................................. 262

13.2.2 A/D Control/Status Register (ADCSR)................................................................ 263

13.2.3 A/D Control Register (ADCR) ............................................................................. 265

13.3

CPU Interface .................................................................................................................... 266

13.4

Operation ........................................................................................................................... 268

13.4.1 Single Mode (SCAN = 0) ..................................................................................... 268

13.4.2 Scan Mode (SCAN = 1) ....................................................................................... 270

13.4.3 Input Sampling and A/D Conversion Time.......................................................... 272

13.4.4 MTU Trigger Input Timing.................................................................................. 274

13.5

A/D Conversion Precision Definitions.............................................................................. 274

13.6

Notes on Use...................................................................................................................... 276

13.6.1 Analog Voltage Settings....................................................................................... 276

13.6.2 Handling of Analog Input Pins............................................................................. 276

Section 14 Pin Function Controller (PFC).................................................................... 279

14.1

Overview............................................................................................................................ 279

14.2

Register Configuration ...................................................................................................... 282

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