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M32C/8A датащи(PDF) 186 Page - Renesas Technology Corp |
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M32C/8A датащи(HTML) 186 Page - Renesas Technology Corp |
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186 / 372 page ![]() M32C/8A Group 15. Timers (Timer B) Rev.1.00 Jul 15, 2007 Page 169 of 352 REJ09B0385-0100 Figure 15.24 TB0MR to TB5MR Registers in Pulse Period Measurement Mode, Pulse Width Measurement Mode b7 0 1 b6 b5 b4 b1 b2 b3 Symbol TB0MR to TB5MR Address 035Bh, 035Ch, 035Dh, 031Bh, 031Ch, 031Dh After Reset 00XX 0000b b0 Function Bit Symbol Bit Name RW MR3 TCK1 RW RW RW RO MR1 TCK0 Timer Bi Mode Register (i = 0 to 5) (Pulse Period Measurement Mode, Pulse Width Measurement Mode) TMOD1 RW RW MR0 b1 b0 1 0: Pulse period measurement mode Pulse width measurement mode Operating mode select bits TMOD0 RW NOTES: 1. Bits MR1 and MR0 determine the following measurement modes: Pulse period measurement 1 (bits MR1 and MR0 are set to 00b): Measures the width between the falling edges of a pulse Pulse period measurement 2 (bits MR1 and MR0 bits are set to 01b): Measures the width between the rising edges of a pulse Pulse width measurement (bits MR1 and MR0 bits are set to 10b): Measures the width between a falling edge and a rising edge of a pulse, and between a rising edge and a falling edge of a pulse 2. The MR3 bit is undefined when reset. 3. To set the MR3 bit to 0 (no overflow), wait for one or more count source cycles to write a 0 to the TBiMR register after the MR3 bit becomes 1 (overflow), while the TBiS bit in TABSR or TBSR register is set to 1 (count starts). 4. Bits CNT3 to CNT0 in the TCSPR register select no division (n = 0) or divide-by-2n (n = 1 to 15). To select f2n, set the CST bit in the TCSPR register to 1 before setting bits TCK1 and TCK0 to 10b. MR2 RW − Registers TB0MR and TB3MR: Set to 0 in pulse period measurement mode, pulse width measurement mode. Registers TB1MR, TB2MR, TB4MR, and TB5MR: Unimplemented. Write 0. Read as undefined value. Measurement mode select bits(1) b3 b2 0 0: Pulse period measurement 1 0 1: Pulse period measurement 2 1 0: Pulse width measurement 1 1: Do not set to this value b7 b6 0 0: f1 0 1: f8 1 0: f2n(4) 1 1: fC32 Count source select bits Timer Bi overflow flag(2) 0: No overflow has occurred 1: Overflow has occurred(3) |
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