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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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M32C/8A датащи(PDF) 184 Page - Renesas Technology Corp |
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M32C/8A датащи(HTML) 184 Page - Renesas Technology Corp |
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184 / 372 page  M32C/8A Group 15. Timers (Timer B) Rev.1.00 Jul 15, 2007 Page 167 of 352 REJ09B0385-0100 Figure 15.22 TB0MR to TB5MR Registers in Timer Mode b7 0 0 0 b6 b5 b4 b1 b2 b3 Symbol TB0MR to TB5MR Address 035Bh, 035Ch, 035Dh, 031Bh, 031Ch, 031Dh After Reset 00XX 0000b b0 Function Bit Symbol Bit Name RW MR3 TCK1 RW RW RW − MR1 Count source select bits TCK0 Timer Bi Mode Register (i = 0 to 5)(Timer Mode) TMOD1 RW RW MR0 b1 b0 0 0: Timer mode Operating mode select bits TMOD0 RW Disabled in timer mode. Can be set to either 0 or 1 Disabled in timer mode. Write 0. Read as undefined value. b7 b6 0 0: f1 0 1: f8 1 0: f2n(1) 1 1: fC32 NOTE: 1. Bits CNT3 to CNT0 in the TCSPR register select no division (n = 0) or divide-by-2n (n = 1 to 15). To select f2n, set the CST bit in the TCSPR register to 1 before setting bits TCK1 and TCK0 to 10b. MR2 RW − Registers TB0MR and TB3MR: Set to 0 in timer mode. Registers TB1MR, TB2MR, TB4MR, and TB5MR: Unimplemented. Write 0. Read as undefined value. |
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