M16CSLASH29 datasheet(149/499 Pages) RENESAS

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12. Timer (Three-phase Motor Control Timer Function)

page 125

12.3 Three-phase Motor Control Timer Function

Timers A1, A2, A4 and B2 can be used to output three-phase motor drive waveforms. Table 12.10 lists the

specifications of the three-phase motor control timer function. Figure 12.24 shows the block diagram for

three-phase motor control timer function. Also, the related registers are shown on Figures 12.26 to 12.32.

Table 12.10 Three-phase Motor Control Timer Function Specifications

Item

Specification

Three-phase waveform output pin

___

Six pins (U, U, V, V, W, W)

Forced cutoff input (1)

_____

Input “L” to SD pin

Used Timers

Timer A4, A1, A2 (used in the one-shot timer mode)

___

Timer A4: U- and U-phase waveform control

___

Timer A1: V- and V-phase waveform control

___

Timer A2: W- and W-phase waveform control

Timer B2 (used in the timer mode)

Carrier wave cycle control

Dead time timer (3 eight-bit timer and shared reload register)

Dead time control

Output waveform

Triangular wave modulation, Sawtooth wave modification

Enable to output “H” or “L” for one cycle

Enable to set positive-phase level and negative-phase

level respectively

Carrier wave cycle

Triangular wave modulation: count source x (m+1) x 2

Sawtooth wave modulation: count source x (m+1)

m: Setting value of TB2 register, 0 to 65535

Count source: f1, f2, f8, f32, fC32

Three-phase PWM output width

Triangular wave modulation: count source x n x 2

Sawtooth wave modulation: count source x n

n: Setting value of TA4, TA1 and TA2 register (of TA4,

TA41, TA1, TA11, TA2 and TA21 registers when setting

the INV11 bit to 1), 1 to 65535

Count source: f1, f2, f8, f32, fC32

Dead time

Count source x p, or no dead time

p: Setting value of DTT register, 1 to 255

Count source: f1, f2, f1 divided by 2, f2 divided by 2

Active level

Eable to select “H” or “L”

Positive and negative-phase concurrent

Positive and negative-phases concurrent active disable

function

Positive and negative-phases concurrent active detect func-

tion

Interrupt frequency

For Timer B2 interrupt, select a carrier wave cycle-to-cycle

basis through 15 times carrier wave cycle-to-cycle basis

NOTE:

1. When the INV02 bit in the INVC0 register is set to 1 (three-phase motor control timer function), the

_____

SD function of the P85/SD pin is enabled. At this time, the P85 pin cannot be used as a programmable

_____

I/O port. When the SD function is not used, apply “H” to the P85/SD pin.

_____

When the IVPCR1 bit in the TB2SC register is set to 1 (enable three-phase output forced cutoff by SD

_____

pin input), and “L” is applied to the SD pin, the related pins enter high-impedance state regardless of

the functions which are used. When the IVPCR1 bit is set to 0 (disabled three-phase output forced

_____

cutoff by SD pin input) and “L” is applied to the SD pin, the related pins can be selected as a program-

mable I/O port and the setting of the port and port direction registers are enable.

Related pins:

P72/CLK2/TA1OUT/V/RXD1

_________ _________

___

P73/CTS2/RTS2/TA1IN/V/TXD1

P74/TA2OUT/W

____

P75/TA2IN/W

P80/TA4OUT/U

___

P81/TA4IN/U

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