M306V2EEFS datasheet(173/271 Pages) RENESAS

173 / 271 page

Rev.1.40

Oct 06, 2004 page 173 of 269

M306V2ME-XXXFP, M306V2EEFP

2.14.7 Reference Voltage Generating Circuit and Comparator

The composite video signal clamped by the clamping circuit is input to the reference voltage generating

circuit and the comparator.

(1) Reference voltage generating circuit

This circuit generates a reference voltage (slice voltage) by using the amplitude of the clock run-in

pulse in line specified by the data slice line specification circuit. Connect a capacitor between the

VHOLD pin and the VSS pin, and make the length of wiring as short as possible so that a leakage

current may not be generated.

(2) Comparator

The comparator compares the voltage of the composite video signal with the voltage (reference volt-

age) generated in the reference voltage generating circuit, and converts the composite video signal

into a digital value.

2.14.8 Start Bit Detecting Circuit

This circuit detects a start bit at line decided in the data slice line specification circuit.

The detection of a start bit is described below.

➀ A sampling clock is generated by dividing the reference clock output by the timing signal.

➁ A clock run-in pulse is detected by the sampling clock.

➂ After detection of the pulse, a start bit pattern is detected from the comparator output.

2.14.9 Clock Run-in Determination Circuit

This circuit determinates clock run-in by counting the number of pulses in a window of the composite

video signal.

The reference clock count value in one pulse cycle is stored in bits 3 to 7 of the clock run-in detect register

(address 026916). Read out these bits after the occurrence of a data slicer interrupt (refer to 2.14.12

Interrupt request generating circuit).

Figure 2.14.10 shows the structure of clock run-in detect register.

Figure 2.14.10 Clock run-in detect register

b7 b6 b5 b4 b3 b2 b1 b0

Clock run-in detect register

Test bits

Number of reference clocks to

be counted in one clock run-in

pulse period.

Clock run-in detection bits

Read-only

Function

Bit name

Bit symbol

CRD3

Symbol

Address

When reset

CRD

026916

0016

CRD4

CRD5

CRD6

CRD7

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