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STLC1502 датащи(PDF) 16 Page - STMicroelectronics |
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STLC1502 датащи(HTML) 16 Page - STMicroelectronics |
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16 / 81 page ![]() STLC1502 16/81 Figure 6: EDM block diagram It is possible to connect up to 4 external chips with x8, x16, and x32 data bus. Each memory bank space is 8Mbytes big so that a standard 64Mbit DRAM device can be connected. It is not possible to use a single 32Mbytes memory device. It is the responsibility of the ARM code to properly configure the EDM block to initialize the DRAM at startup. The external memory is mapped by the EDM interface as shown in Fig. 7. Figure 7: EDM memory map In the following table there is the list of the available external signals of the EDM interface. NAME Signal type Description EDM_CS(3:0) OUT Chip Select. Asserted when the EDM decodes the proper address space in order to select the right external device. To be con- nected to RAS signal in case of use of EDO memories EDM_CLK OUT SDRAM Memory clock (same as ARM clock). Not used with EDO. EDM_CLKEN OUT SDRAM clock enable. Not used with EDO. External EDM 11800000 EDM_CS0 EDM_CS1 EDM_CS2 EDM_CS3 13FFFFFF 117FFFFF 11000000 10FFFFFF 10800000 107FFFFF 10000000 Reserved 11FFFFFF 12000000 10000000 13FFFFFF DRAM |
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