MCP4725 datasheet(17/42 Pages) MICROCHIP

17 / 42 page

DS22039C-page 17

MCP4725

6.0

THEORY OF OPERATION

When the device is connected to the I2C bus line, the

device is working as a slave device. The Master (MCU)

can write/read the DAC input register or EEPROM

using the I2C interface command. The MCP4725

device address contains four fixed bits ( 1100 = device

code) and three address bits (A2, A1, A0). The A2 and

A1 bits are hard-wired during manufacturing, and A0 bit

is determined by the logic state of A0 pin. The A0 pin

can be connected to VDD or VSS, or actively driven by

digital logic levels.

The following sections describe the communication

protocol to send or read the data code and write/read

the EEPROM using the I2C interface. See

Section 7.0

“I2C Serial Interface Communication”.

6.1

Write Commands

The write commands are used to load the configuration

bits and DAC input code to the DAC register, or to write

to the EEPROM of the device. The write command

types are defined by using three write command type

bits (C2, C1, C0). Table 6-2 shows the write command

types and their functions. There are three command

types for the MCP4725. The four “reserved” commands

in Table 6-2 are for future use. The MCP4725 ignores

the “reserved” commands. Write command protocol

examples are shown in Figure 6-1 and Figure 6-2.

The input data code is coded as shown in Table 6-1.

The MSB of the data is always transmitted first and the

format is unipolar binary.

TABLE 6-1:

INPUT DATA CODING

6.1.1

WRITE COMMAND FOR FAST

MODE (C2 = 0, C1 = 0, C0 = X,

X = DON’T CARE)

The fast write command is used to update the DAC

affected by this command. This command updates

Power-Down mode selection bits (PD1 and PD0) and

12 bits of the DAC input code in the DAC register.

Figure 6-1 shows an example of the fast write

command for the MCP4725 device.

6.1.2

WRITE COMMAND FOR DAC INPUT

In MCP4725, this command performs the same

function as the Fast Mode command in

Section 6.1.1

“Write Command for Fast mode (C2 = 0, C1 = 0,

C0 = X, X = Don’t Care)”. Figure 6-2 shows the write

command protocol for the MCP4725.

As shown in Figure 6-2, the D11 - D0 bits in the third

and fourth bytes are DAC input data. The last 4 bits (X,

X, X, X) in the fourth byte are don’t care bits.

The device executes the Master’s write command after

receiving the last byte (4th byte). The Master can send

a STOP bit to terminate the current sequence, or send

a Repeated START bit followed by an address byte. If

the device receives three data bytes continuously after

the 4th byte, it updates from the 2nd to the 4th data

bytes with the last three input data bytes.

The contents of the register are updated at the end of

the 4th byte. The device ignores any partially received

data bytes if the I2C communication with the Master

ends before completing the 4th byte.

6.1.3

WRITE COMMAND FOR DAC INPUT

(C2 = 0, C1 = 1, C0 = 1)

When the device receives this command, it (a) loads

the configuration and data bits to the DAC register, and

(b) also writes the EEPROM. When the device is

writing the EEPROM, the RDY/BSY bit goes low and

stays low until the EEPROM write operation is

completed. The state of the RDY/BSY bit can be

monitored by a read command. Figure 6-2 shows the

details of the this write command protocol and

Figure 6-3 shows the details of the read command.

Input Code

Nominal Output Voltage

(V)

111111111111

(FFFh)

VDD - 1 LSB

111111111110

(FFEh)

VDD - 2 LSB

000000000010

(002h)

2 LSB

000000000001

(001h)

1 LSB

000000000000

(000h)

MCP4725 датащи(PDF) 17 Page - Microchip Technology

MCP4725 датащи(HTML) 17 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42

датащи скачать

ссылки URL