MCP4725 datasheet(28/42 Pages) MICROCHIP

28 / 42 page

MCP4725

DS22039C-page 28

8.2

Using Non-Volatile EEPROM

Memory

The user can store the DAC input code (12 bits) and

power-down configuration bits (2 bits) in the internal

non-volatile EEPROM memory using the I2C write

command. The user can also read the EEPROM data

using the I2C read command. When the device is first

powered after power is shut down, the device uploads

the EEPROM contents to the DAC register automati-

cally and provides the DAC output immediately. This

feature is very useful in applications where the DAC

device is used to provide set point or calibration data for

other devices in the application system. The DAC will

not lose the important system operational parameters

due to the system power failure incidents. See

Section 5.6 “Non-Volatile EEPROM Memory” for

more details of the non-volatile EEPROM memory.

8.3

Power Supply Considerations

The power supply to the device is used for both VDD

and DAC reference voltage. Any noise induced on the

VDD line can affect on the DAC performance. Typical

application will require a bypass capacitor in order to

filter out high frequency noise on the VDD line. The

noise can be induced onto the power supply’s traces or

as a result of changes on the DAC output. The bypass

capacitor helps to minimize the effect of these noise

sources on signal integrity. Figure 8-1 shows an

example of using two bypass capacitors (a 10 µF

tantalum capacitor and a 0.1 µF ceramic capacitor) in

parallel on the VDD line. These capacitors should be

placed as close to the VDD pin as possible (within

4mm).

The power source should be as clean as possible. If the

application circuit has separate digital and analog

power supplies, the VDD and VSS pins of the MCP4725

should reside on the analog plane.

8.4

Layout Considerations

Inductively-coupled AC transients and digital switching

noise

from

other

devices

can

affect

DAC

performance and DAC output signal integrity. Careful

board layout will minimize these effects. Bench testing

has shown that a multi-layer board utilizing a low-induc-

tance ground plane, isolated inputs, isolated outputs

and proper decoupling are critical to achieving the

performance that the MCP4725 is capable of providing.

Particularly harsh environments may require shielding

of critical signals. Separate digital and analog ground

planes are recommended. In this case, the VSS pin and

the ground pins of the VDD capacitors of the MCP4725

should be terminated to the analog ground plane.

8.5

Application Examples

The MCP4725 is a rail-to-rail output DAC designed to

operate with a VDD range of 2.7V to 5.5V. Its output

amplifier is robust enough to drive common, small-sig-

nal loads directly, thus eliminating the cost and size of

an external buffer for most applications.

8.5.1

DC SET POINT OR CALIBRATION

A common application for the MCP4725 is a

digitally-controlled set point or a calibration of variable

parameters such as sensor offset or bias point.

Example 8-1 shows an example of the set point setting.

Since the MCP4725 is a 12-bit DAC and uses the VDD

supply as a reference source, it provides a VDD/4096 of

resolution per step.

MCP4725 датащи(PDF) 28 Page - Microchip Technology

MCP4725 датащи(HTML) 28 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42

датащи скачать

ссылки URL