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MK50H27PLCC датащи(PDF) 23 Page - STMicroelectronics |
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MK50H27PLCC датащи(HTML) 23 Page - STMicroelectronics |
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23 / 56 page ![]() 4.1.2.6 Control and Status Register 5 (CSR5) CSR5 facilitates control and monitoring of modem controls. RAP<3:1> = 5 BIT NAME DESCRIPTION 15:05 0 Reserved, must be written as zeroes. 4 RTSEN RTS/CTS ENABLE is a READ/WRITE bit used to configure pins 26 and 30. If this bit is set, pin 26 becomes RTS and pin 30 becomes CTS. RTS is driven low whenever the MK50H27 has data to trans- mit and is kept low during transmission. RTS will be driven high after the closing flag of a signal unit is transmited if either no other frames are in the FIFO or if the minimum signal unit spacing is higher than 2 (see Mode Register). The MK50H27 will not begin transmission and TD will remain HIGH if CTS is high. If RTSEN = 0 then pins 26 and 30 become programmable I/O pins DTR and DSR. The direction and behavior of DSR and DTR are controlled by the following bits. 3 DTRD DTR DIRECTION is a READ/WRITE bit used to control the direction of the DTR pin. If DTRD = 0, the DTR pin becomes an input pin and the DTR bit reflects the current value of the pin; if DTRD = 1, the DTR pin is an output pin controlled by the DTR bit below. 2 DSRD DSR DIRECTION is a READ/WRITE bit used to control the direction of the DSR pin. If DSRD = 0, the DSR pin becomes an input pin and the DSR bit reflects the current value of the pin; if DSRD = 1, the DSR pin is an output pin controlled by the DSR bit below. 1 DTR DATA TERMINAL READY is used to control or observe the DTR I/O pin depending on the value of DTRD. If DTRD = 0, this bit be- comes READ ONLY and always equals the current value of the DTR pin. If DTRD = 1, this bit becomes READ/WRITE and any value written to this bit appears on the DTR pin. 0 DSR DATA SET READY is used to control or observe the DSR I/O pin depending on the value of DSRD. If DSRD = 0, this bit be- comes READ ONLY and always equals the current value of the DSR pin. If DSRD = 1 this bit becomes READ/WRITE and any value written to this bit appears on the DSR pin. 1 5 1 0 1 4 0 9 1 2 1 1 0 8 0 3 0 7 0 2 0 6 0 5 0 4 0 1 0 0 1 3 0 0 0 000000 D T R D D S R D D T R D S R R T S E N X E D G E 0 MK50H27 23/56 |
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