CHR71000 datasheet(20/54 Pages) AMSOSRAM

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CHR71000

Functional description

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The pixel array has 7096 rows and 10000 columns (dummy lines and columns not included)

and is read out in landscape mode. The readout sequence begins by starting an integration

period at the first row of the window. The address decoder is used to load pointers into the

integration time shift register at the start address (writeable over SPI). The shift registers shifts

its value into the next row at each clk_Y pulse (internally or externally generated). After the

required integration time, the readout of the window is started. This is done by loading a

pointer into the read shift register. This pointer is also shifted to the next row at each clk_Y

pulse (see also 7.3.2.1). The row selection logic is equipped at both sides to speed up the row

access time.

When a particular row is selected, its pixel values appear on the pixel column bus at the input

of the column amplifiers. These pixel values are sampled into the sample and hold capacitors

located in the column amplifier block. The column amplifier first samples the reset level of the

pixel, and then, after a transfer line pulse, the photo-induced signal of the pixels is sampled.

The X shift register is then activated. Both signals are sequentially sampled over 16

multiplexed bus lines to 8 parallel output channels. Subsampling in Y can be achieved by

programming the corresponding register, while 1-out-of-8 subsampling in the X direction is

achieved by just sampling data from a single output channel (ignoring data from other outputs).

An SPI interface is provided to program different on-chip registers. Amongst these registers

are the start and stop addresses of the window, bias settings for amplifiers, gain and offset

registers of the output channels, standby of output channels, etc.

It is provided that the sensor can be fully operated by external control signals. This is a

guarantee for the largest flexibility in mode of operation and possibility for full timing

optimization of the different blocks. However, we have also put a sequencer on-chip that will

generate all required control signals to operate the sensor from only a few external control

clocks. The timing of the signals from the sequencer is based on best operation mode

simulations but still quite allow some programmability. It supports full frame readout with

programmable integration time, number of frames, as well as subsampled and windowed

operation with possibility to move the window from frame to frame.

The default start-up condition is with external control signals. The sequencer can be activated

through the SPI interface and settings of an on-chip register. At that moment, most of the

external control signals are ignored and are generated by the sequencer instead.

CHR71000 датащи(PDF) 20 Page - ams-OSRAM AG