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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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CC113LRGPR датащи(PDF) 23 Page - Texas Instruments |
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CC113LRGPR датащи(HTML) 23 Page - Texas Instruments |
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23 / 87 page  CC113L www.ti.com SWRS108B – MAY 2011 – REVISED JUNE 2014 5.6 Microcontroller Interface and Pin Configuration In a typical system, CC113L will interface to a microcontroller. This microcontroller must be able to: • Program CC113L into different modes • Read buffered data • Read back status information through the 4-wire SPI-bus configuration interface (SI, SO, SCLK, and CSn) 5.6.1 Configuration Interface The microcontroller uses four I/O pins for the SPI configuration interface (SI, SO, SCLK, and CSn). The SPI is described in Section 5.5. 5.6.2 General Control and Status Pins The CC113L has two dedicated configurable pins (GDO0 and GDO2) and one shared pin (GDO1) that can output internal status information useful for control software. These pins can be used to generate interrupts on the MCU. See Section 5.18 for more details on the signals that can be programmed. GDO1 is shared with the SO pin in the SPI interface. The default setting for GDO1/SO is 3-state output. By selecting any other of the programming options, the GDO1/SO pin will become a generic pin. When CSn is low, the pin will always function as a normal SO pin. Copyright © 2011–2014, Texas Instruments Incorporated Detailed Description 23 Submit Documentation Feedback Product Folder Links: CC113L |
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