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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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TUSB1146 датащи(PDF) 6 Page - Texas Instruments |
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TUSB1146 датащи(HTML) 6 Page - Texas Instruments |
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6 / 68 page  6 TUSB1146 SLLSFB2 – APRIL 2020 www.ti.com Product Folder Links: TUSB1146 Submit Documentation Feedback Copyright © 2020, Texas Instruments Incorporated Power Supply Characteristics (continued) over operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT PCC(ACTIVE-USB-DP1) Average active power USB + 2 Lane DP Link in U0 with GEN2 data transmission; EQ control pins = NC; PRBS7 pattern at 10 Gbps, VID = 1000 mVPP; LINR_L3; CTL1 = H; CTL0 = H 520 mW PCC(ACTIVE--4DP) Average active power 4 Lane DP Only Four active DP lanes operating at 8.1Gbps; PRBS7 pattern; CTL1 = H; CTL0 = L; LINR_L3; 500 mW PCC(NC-USB) Average power with no connection No GEN2 device is connected to TXP/TXN; CTL1 = L; CTL0 = H; 3.5 mW PCC(U2U3) Average power in U2/U3 Link in U2 or U3; USB Mode Only; CTL1 = L; CTL0 = H; 2.0 mW PCC(HPDLOW--4DP) Power 4 Lane DP Only when HPDIN = L CTL1 = H; CTL0 = L; HPDIN = L; 0.475 mW PCC(DISABLED-I2C) Device Diabled power in I2C Mode I2C_EN != 0; HPDIN = L; 0.122 mW PCC(DISABLED) Device Diabled power CTL1 = L; CTL0 = L; I2C_EN = 0; HPDIN = L; 0.110 mW 6.6 Control I/O DC Electrical Characteristics over operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT 4-level Inputs 4-Level VTH Threshold 0 / R VCC = 3.3 V 0.55 V 4-Level VTH Threshold R/ Float VCC = 3.3 V 1.65 V 4-Level VTH Threshold Float / 1 VCC33 = 3.3 V 2.7 V IIH High level input current VCC = 3.6 V; VIN = 3.6 V 20 60 µA IIL Low level input current VCC = 3.6 V; VIN = 0 V –100 -40 µA RPU Internal pull-up resistance 48 kΩ RPD Internal pull-down resistance 98 kΩ 2-State CMOS Input (CTL0, CTL1, FLIP). CTL0 and FLIP are Failsafe. VIH High-level input voltage VCC = 3.0V 2 3.6 V VIL Low-level input voltage VCC = 3.6V 0 0.8 V RPD Internal pull-down resistance for HPDIN, CADSNK 400 500 600 k Ω RPD Internal pull-down resistance for CTL1 300 400 500 k Ω IIH_CTL1 High-level input current for CTL1 VIN = 3.6 V –11 11 µA IIL_CTL1 Low-level input current for CTL1 VIN = GND, VCC = 3.6 V –1 1 µA IIH_HPD_CAD High-level input current for HPDIN, CADSNK VIN = 3.6 V –11 11 µA IIL_HPD_CAD Low-level input current for HPDIN, CADSNK VIN = GND, VCC = 3.6 V –1 1 µA IIH_CTL0_FLIP High-level input current for CTL0 and FLIP VIN = 3.6 V; I2C_EN = 0 –1 1 µA IIL_CTL0_FLIP Low-level input current for CTL0 and FLIP VIN = GND, VCC = 3.6 V; I2C_EN = 0; –1 1 µA I2C Control Pins (SCL, SDA) VIH_3p3V High-level input voltage when configured for 3.3V I2C level I2C_EN = 1 2.0 3.6 V VIL_3p3V Low-level input voltage when configured for 3.3V I2C level I2C_EN = 1 0 0.8 V VIH_1p8V High-level input voltage when configured for 1.8V I2C level I2C_EN = F 1.2 V VIL_1p8V Low-level input voltage when configured for 1.8V I2C level I2C_EN = F 0 0.6 V VOL Low-level output voltage I2C_EN = 0; IOL = 6 mA 0 0.4 V |
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