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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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TUSB1146 датащи(PDF) 43 Page - Texas Instruments |
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TUSB1146 датащи(HTML) 43 Page - Texas Instruments |
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43 / 68 page  43 TUSB1146 www.ti.com SLLSFB2 – APRIL 2020 Product Folder Links: TUSB1146 Submit Documentation Feedback Copyright © 2020, Texas Instruments Incorporated Table 20. AEQ_CONTROL2 Register Field Descriptions Bit Field Type Reset Description 7 OVER_EQ_SIGN R/W 0x0 Selects the sign for OVER_EQ_CTRL field. 0x0 = positive 0x1 = negative 6 RESERVED R 0x0 Reserved 5-3 FASTAEQ_LIMITS R/W 0x4 Selects the upper/lower limits of DAC for determining short vs long channel. 0x0 = +/- 0mV 0x1 = +/- 40mV 0x2 = +/- 80mV 0x3 = +/- 120mV 0x4 = +/- 160mV 0x5 = +/- 200mV 0x6 = +/- 240mV 0x7 = +/- 280mV 2-0 OVER_EQ_CTRL R/W 0x0 This field will increase or decrease the AEQ by value programmed into this field. For example, full AEQ value is 6 and this field is programmed to 2 and OVER_EQ_SIGN = 0, then EQ value used will be 8. This field is only used in Full AEQ mode. 0x0 = 0 or -8 0x1 = 1 or -7 0x2 = 2 or -6 0x3 = 3 or -5 0x4 = 4 or -4 0x5 = 5 or -3 0x6 = 6 or -2 0x7 = 7 or -1 8.6.1.9 AEQ_LONG Register (Offset = 0x1E) [reset = 0x77] AEQ_LONG is shown in Table 21. Return to the Summary Table. This register is used to program the EQ used for long channel setting when Fast AEQ is enabled. Table 21. AEQ_LONG Register Field Descriptions Bit Field Type Reset Description 7-4 LONG_EQ2 R/W 0x7 When AEQ_EN = 1 and AEQ_MODE = x0, selects EQ setting for USB downstream facing port1 (RX2) when long channel is detected. Value programmed into this field should provide best Rx JTOL results for long channel configuration. 3-0 LONG_EQ1 R/W 0x7 When AEQ_EN = 1 and AEQ_MODE = x0, selects EQ setting for USB downstream facing port2 (RX1) when long channel is detected. Value programmed into this field should provide best Rx JTOL results for long channel configuration. 8.6.1.10 USBC_EQ Register (Offset = 0x20) [reset = 0x0] USBC_EQ is shown in Table 22. Return to the Summary Table. This register controls the receiver equalization setting for the DFP (RX1 and RX2). |
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