TUSB1146 datasheet(46/68 Pages) TI2

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TUSB1146

SLLSFB2 – APRIL 2020

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8.6.1.14 VOD_CTRL Register (Offset = 0x32) [reset = 0x40]

VOD_CTRL is shown in Table 26.

Return to the Summary Table.

This register controls the transmitters output linearity range for both UFP and DFP. When device is configured for

limited redriver (SSRX_LIMIT_ENABLE field is set), USB_SSRX_VOD controls the VOD level for SSRX limited

driver.

Table 26. VOD_CTRL Register Field Descriptions

Bit

Field

Type

Reset

Description

7-6

LFPS_TX12_VOD

R/W

0x1

VOD linearity control for TX1 or TX2 when LFPS is being

transmitted.

0x0 = LINR_L3 (highest)

0x1 = LINR_L2

0x2 = LINR_L1

0x3 = LINR_L0 (lowest)

5-4

DP_VOD

R/W

0x0

VOD linearity control for DP paths.

0x0 = LINR_L3 (highest)

0x1 = LINR_L2

0x2 = LINR_L1

0x3 = LINR_L0 (lowest)

3-2

USB_TX12_VOD

R/W

0x0

VOD linearity control for USB downstream facing ports (TX1 and

TX2).

0x0 = LINR_L3 (highest)

0x1 = LINR_L2

0x2 = LINR_L1

0x3 = LINR_L0 (lowest)

1-0

USB_SSRX_VOD

R/W

0x0

VOD linearity control for USB upstream facing port (SSRX). When

SSRX_LIMIT_ENABLE = 1, then this field controls the limited VOD

for SSRX.

0x0 = LINR_L3 (highest)

0x1 = LINR_L2

0x2 = LINR_L1

0x3 = LINR_L0 (lowest)

8.6.1.15 AEQ_STATUS Register (Offset = 0x3B) [reset = 0x0]

AEQ_STATUS is shown in Table 27.

Return to the Summary Table.

This register provides the status of AEQ function.

Table 27. AEQ_STATUS Register Field Descriptions

Bit

Field

Type

Reset

Description

7-5

RESERVED

0x0

Reserved

DONE_STAT

0x0

This flag is set after DAC wait timer expires.

3-0

AEQ_STAT

0x0

Optimal EQ determined by FSM after the completion of Full AEQ.

This field will also indicate EQ used for Fast AEQ. This field will

include the value programmed into OVER_EQ_CTRL field.

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