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L99DZ80EP датащи(PDF) 33 Page - STMicroelectronics |
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L99DZ80EP датащи(HTML) 33 Page - STMicroelectronics |
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33 / 68 page ![]() DocID18260 Rev 6 33/68 L99DZ80EP Application information 67 3.5 Overvoltage and undervoltage detection at VS If the power supply voltage VS rises above the overvoltage threshold VSOV_OFF, the outputs OUT1 to OUT11, ECDR, ECV, ECFD are switched to high impedance state, the charge pump is disabled and the H-Bridge gate drivers are switched into sink condition to protect the H-bridge and the load. When the voltage VS drops below the undervoltage threshold VSUV_OFF (UV-switch-OFF voltage), the output stages are switched to high impedance to avoid the operation of the power devices without sufficient gate driving voltage (increased power dissipation). If the supply voltage VS recovers to normal operating voltage, the charge pump is switched on again, the CP_LOW bit is cleared and the output stages return to the programmed state. If the undervoltage/overvoltage recovery disable bit is set, the automatic turn-on of the drivers is deactivated. If the undervoltage/overvoltage recovery disable bit (OV_UV_RD) is set, the microcontroller needs to clear the status bits to reactivate the drivers. It is recommended to set OV_UV_RD bit to avoid a possible high current oscillation in case of a shorted output to GND and low battery voltage. 3.6 Overvoltage and undervoltage detection at VCC At power-on (VCC increases from undervoltage to VPOROFF) the circuit is initialized by an internally generated power-on-reset (POR). If the voltage VCC decreases below the low threshold (VPORON), the outputs are switched to 3-state (high impedance) and the status registers are cleared. If the voltage at pin VCC increases above the VCC reset high threshold VVCCRESHU, the device enters the reset state, all outputs are switched off and all internal registers are cleared. After the voltage at pin VCC has decreased below VVCCRESHL, the device enters normal operating mode again and the internal registers are reset. 3.7 Temperature warning and shutdown If the junction temperature rises above the temperature warning threshold (TjTW), a temperature warning flag is set after the temperature warning filter time (Tjtft) and can be read via SPI. If the junction temperature increases above the temperature shutdown threshold (TjTS), the thermal shutdown bit is set and the power transistors of all output stages are switched off to protect the device after the thermal shutdown filter time. The gates of the H-Bridge are discharged by the ‘Resistive Low’ mode. The temperature warning and thermal shutdown flags are latched and must be cleared by the microcontroller. This is done by a read and clear command on an arbitrary register, because both bits are part of the global status register. After these bits have been cleared, the output stages are reactivated. If the temperature is still above the thermal warning threshold, the thermal warning bit is set after Tjtft. Once this bit is set and the temperature is above the temperature shutdown threshold, temperature shutdown is detected after Tjtft and the outputs are switched off. Therefore the minimum time after which the outputs are switched off after the bits have been cleared in case the temperature is still above the thermo-shutdown threshold is twice the thermo-warning/- shutdown filter time Tjtft. |
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