L99MH98 datasheet(146/147 Pages) STMICROELECTRONICS

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List of figures

Figure 1.

Block diagram .................................................................... 3

Figure 2.

Pin connection (top view) ............................................................. 4

Figure 3.

H-driver delay times ............................................................... 14

Figure 4.

Watchdog early, late and safe window ................................................... 14

Figure 5.

Main operating modes .............................................................. 21

Figure 6.

Example of possible configuration to assign a key at each half-bridge ............................. 23

Figure 7.

Example of possible configuration where a key is associated to a different half-bridge .................. 23

Figure 8.

Example of fault on HB1 ............................................................ 24

Figure 9.

Example of HBs configured with the same key ............................................. 24

Figure 10.

VDH and VDD high, EN pin goes high and low .............................................. 26

Figure 11.

VDH and VDD high, EN pin goes high and low .............................................. 26

Figure 12.

VDH, VDD and EN pin goes high and low with the same slew rate ................................ 26

Figure 13.

VDD and EN goes high, VDH goes high and low............................................. 27

Figure 14.

CPLOW flag ..................................................................... 28

Figure 15.

Overview of indirect current measurement ................................................ 30

Figure 16.

Vds measurement by CSO1/2 ......................................................... 32

Figure 17.

Extract of application diagram for temperature measurement ................................... 33

Figure 18.

Power ON/OFF steps for gate drivers ................................................... 34

Figure 19.

Full-bridge drain source monitoring diagnosis .............................................. 36

Figure 20.

Simplified block diagram with one DC motor controlled by two half-bridges.......................... 37

Figure 21.

One motor in normal conditions, Ishx_PU HB1/HB2 OFF with normal load ........................... 38

Figure 22.

One motor in normal conditions with one pull-up diagnostic current on - Configuration 2................. 38

Figure 23.

One motor in normal conditions with one pull-up diagnostic current on - Configuration 3................. 39

Figure 24.

Short circuit to VDH ................................................................ 39

Figure 25.

Short circuit to GND ............................................................... 40

Figure 26.

One motor - Diagnostic results with an open load at SH1 ...................................... 41

Figure 27.

One motor - Diagnostic results with an open load at SH2 ...................................... 41

Figure 28.

Seven cascaded DC motors summary of the off-state diagnostic................................. 42

Figure 29.

Two cascaded DC motors summary of the off-state diagnostic .................................. 43

Figure 30.

Watchdog state diagram ............................................................ 45

Figure 31.

SPI connection ................................................................... 47

Figure 32.

SPI signal description .............................................................. 47

Figure 33.

Write access scenario .............................................................. 50

Figure 34.

Read access scenario .............................................................. 51

Figure 35.

Clear on Read scenario ............................................................. 52

Figure 36.

Write or read with SPI error scenario .................................................... 53

Figure 37.

Access after RESET scenario......................................................... 54

Figure 38.

First SPI access at power-up scenario ................................................... 55

Figure 39.

Access while an internal fault happens scenario ............................................ 56

Figure 40.

Driving 4 DC motors simultaneously ................................................... 130

Figure 41.

Driving 2 DC motors + 2 additional independent loads simultaneously ............................ 131

Figure 42.

Driving 7 DC motors sequentially ..................................................... 132

Figure 43.

Driving 3 DC motors: one current measurement via shunt resistor + 2 indirect current measurement ....... 133

Figure 44.

Driving 4 DC motors simultaneously with not sequentially gate drivers ............................ 134

Figure 45.

VFQFN48L (7x7x0.9 mm exp. pad down) package outline .................................... 135

L99MH98

List of figures

DS14611 - Rev 3

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