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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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STM32WL33C8 датащи(PDF) 18 Page - STMicroelectronics |
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STM32WL33C8 датащи(HTML) 18 Page - STMicroelectronics |
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18 / 91 page  3.8 Clock management Three different clock sources may be used to drive the system clock (CLK_SYS) of the STM32WL33xx (see Figure 8. Fast clock tree generation): • HSI: high speed internal 64 MHz RC oscillator • PLL64M: 64 MHz PLL clock based on HSE 48 MHz • HSE (High Speed External): – high speed 48 MHz external crystal or – provided by a single ended 48 MHz input instead of a crystal The STM32WL33xx has also a slow frequency clock tree used by some peripherals (RTC, watchdog, LPUART, LCDC, LPAWUR and MR_SUBG radio timer). Three different clock sources can be used for this slow clock tree: • LSI: low speed low drift internal RC with a fixed frequency between 24 kHz and 49 kHz depending on the sample. It is called the 32 kHz clock within this document for simplicity. • LSE: – 32.768 kHz low speed external crystal. or – provided by a single-ended 32.768 kHz input instead of a crystal • The CLOCK_ROOT_DIV/512 (see Figure 8): In this case, the slow clock is not available in Deepstop mode and it must not be used for peripherals working in Deepstop mode. Figure 8 provides an overview of the fast clock tree in the STM32WL33xx. STM32WL33xx Functional overview DS14221 - Rev 5 page 18/91 |
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