STM32WL33C8 datasheet(10/91 Pages) STMICROELECTRONICS

10 / 91 page

3.4.1

RF front-end

The RF front-end is based on a direct modulation of the carrier in TX and used a low IF architecture in RX mode.

In transmit mode, three different topologies, with dedicated BOM configuration on the board, address operations

in different output power range according to the selection of TX and TX_HP.

Moreover, the output power is user selectable through the dedicated programmable register. A linearized,

smoothed analog control offers a clean power ramp-up.

In receive mode, the automatic gain control (AGC) can reduce the chain gain at both RF and IF locations, for

optimized interferer rejections. Thanks to the use of complex filtering and highly accurate I/Q architecture, high

sensitivity and excellent linearity can be achieved.

Figure 3. Sub-1GHz IP block diagram

RFSUBG

(analog RF IP)

MR_SUBG

(digital RF IP)

SoC

SUBG_RX_CLK

SUBG_RX_DATA

Global

registers

Radio

registers

RRM

SoC APB

interface

Data buffer

manager

SoC AHB

interface

SoC

RAM

Radio control

Time

management

Wakeup/Sleep

management

Radio FSM

RX analog chain

Power

control

Freq. synth

TX HP

In TX

In RX

SUBG_TX_CLK

SUBG_TX_DATA

interrupts

wakeup request

sleep allowance

3.4.2

TX and RX event alert

The STM32WL33xx is provided with the TX_SEQUENCE and RX_SEQUENCE signals which alert, respectively,

transmission and reception activities.

A signal can be enabled for TX and RX on two pins, through alternate functions:

•

TX_SEQUENCE is available on PA10 (AF2) or PB14 (AF2)

•

RX_SEQUENCE is available on PA8 (AF2) or PA11 (AF2)

The signal is high when radio is in TX (or RX), low otherwise.

The signals can be used to control external antenna switching and support coexistence with other wireless

technologies.

Note:

The RF_ACTIVITY signal is used to notify if there is an ongoing RF operation (either TX or RX). It is a logical

OR between the RX_SEQUENCE and TX_SEQUENCE.

3.4.3

Low power autonomous wake up receiver (LPAWUR)

The STM32WL33xx includes an always-on ultra-low-power wake-up receiver. It is intended to use the reception of

a specific frame to trig the wake up the entire SOC while in Deepstop mode. To work correctly the receiver needs

a 32 kHz clock which can either be supplied by the internal LSI block or an external 32 kHz crystal.

STM32WL33xx

Functional overview

DS14221 - Rev 5

page 10/91

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