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ADS9217 датащи(PDF) 5 Page - Texas Instruments |
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ADS9217 датащи(HTML) 5 Page - Texas Instruments |
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5 / 68 page ![]() Pin Functions (continued) PIN TYPE(1) DESCRIPTION NAME NO. DOUTM 27 O Negative differential data output. Connect a 100Ω resistor between DOUTP and DOUTM close to the receiver. DOUTP 28 O Positive differential data output. Connect a 100Ω resistor between DOUTP and DOUTM close to the receiver. FCLKM 29 O Negative differential data frame clock output. Connect a 100Ω resistor between FCLKP and FCLKM close to the receiver. FCLKP 30 O Positive differential data frame clock output. Connect a 100Ω resistor between FCLKP and FCLKM close to the receiver. GND 2, 7, 8, 9, 11, 12, 15, 34, 38 P Ground. NC 25, 26 – No external connection. Leave floating. PWDN 22 I Power-down control; active low. Connect to VDD_1V8 if unused. REFIO 39 I/O Internal reference voltage output. External reference voltage input. Connect a 10μF decoupling capacitor to REFM. REFM 6, 40 P Reference ground. Connect to GND. RESET 21 I Reset input; active low. Connect to VDD_1V8 if unused. SCLK 18 I Serial clock input for the interface configuration. SDI/EXTREF 19 I SDI is a multifunction logic input; pin function is determined by the SPI_EN pin. SDI has an internal 100kΩ pulldown resistor to GND. SPI_EN = 0b: SDI is the logic input to select between the internal or external reference. Connect SDI to GND for the external reference. Connect SDI to IOVDD for the internal reference. SPI_EN = 1b: Serial data input for the interface configuration. SDO 20 O Serial data output for the configuration interface. SMPL_CLKM 31 I ADC sampling clock input. Negative differential input for the LVDS sampling clock. Connect this pin to GND for the CMOS sampling clock. SMPL_CLKP 32 I ADC sampling clock input. Positive differential input for the LVDS sampling clock. Clock input for the CMOS sampling clock. SMPL_SYNC 33 I Synchronization input for internal averaging filter. Connect to GND if unused. See the Synchronizing Multiple ADCs section on how to use the SMPL_SYNC pin. SPI_EN 16 I Control to enable the SPI configuration; active high. Connect a pullup resistor to VDD_1V8 to keep the configuration interface enabled. Connect to GND if the SPI configuration is unused. Thermal Pad — P Exposed thermal pad. Connect to GND. VCMOUT 5 O Common-mode voltage output. Use VCMOUT to set the common-mode voltage at the ADC inputs. Connect a 1μF decoupling capacitor to GND. VDD_1V8 13, 14, 35, 36, 37 P 1.8V power-supply. Connect 1μF and 0.1μF decoupling capacitors to GND. (1) I = input, O = output, I/O = input or output, G = ground, P = power. www.ti.com ADS9117, ADS9118, ADS9119 SLVSIN3 – MAY 2025 Copyright © 2025 Texas Instruments Incorporated Submit Document Feedback 5 Product Folder Links: ADS9117 ADS9118 ADS9119 |
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