LP8728B-Q1

SNVSA70 – FEBRUARY 2015

www.ti.com

6.4 Thermal Information

LP8728-Q1

THERMAL METRIC(1)

WQFN (RSG)

UNIT

28 PINS

RθJA

Junction-to-ambient thermal resistance(2)

37.7

RθJCtop

Junction-to-case (top) thermal resistance

24.5

RθJB

Junction-to-board thermal resistance

10.8

°C/W

ΨJT

Junction-to-top characterization parameter

0.3

ΨJB

Junction-to-board characterization parameter

10.8

RθJCbot

Junction-to-case (bottom) thermal resistance

2.7

(1)

For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

(2)

Calculated using 4-layer standard JEDEC thermal test board with 5 thermal vias between the die attach pad in the first copper layer and

second copper layer.

6.5 Electrical Characteristics

(1) (2)

Unless otherwise noted, VIN = 5 V, typical values apply for TA = 25°C, and minimum/maximum limits apply over junction

temperature range, TJ = –40°C to 125°C.

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

Shutdown supply current into power

ISHDN

EN_Bx = 0 V

1

6

μA

connections

IOP

Operating current

All buck-converters active, IOUT = 0 mA

20

mA

LOGIC INPUTS (EN_Bx, DEFSEL)

VIL

Input low level

0.4

V

VIH

Input high level

1.6

V

EN_Bx and DEFSEL internal

RPD_DI

300

520

820

k

Ω

pulldown resistance

TH_MIN

Minimum EN_Bx high time

1

ms

TL_MIN

Minimum EN_Bx low time

10

µs

LOGIC OUTPUTS (PG_Bx)

VOL

Output low level

ISINK = 3 mA

0.4

V

RPU

Recommended pullup resistor

10

k

Ω

BUCK CONVERTERS

VOUT1

Output voltage for Buck 1

Fixed voltage

3.3

V

VOUT2

Output voltage for Buck 2

Fixed voltage

1.2

V

DEFSEL = 1

2.65

VOUT3

Output voltage for Buck 3

V

DEFSEL = 0

1.8

VOUT4

Output voltage for Buck 4

Fixed voltage

1.5

V

VFB_Bx

Output voltage accuracy

–3%

3%

Line regulation

4.5 V

≤ VIN_Bx ≤ 5.5 V, ILOAD = 10 mA

3

mV

ΔVOUT

Load regulation

VIN = 5 V, 100 mA ≤ ILOAD ≤ 900 mA

3

mV

DC load

IOUT

Output current

1000

mA

TA = 25°C

fSW

Switching frequency

3.03

3.2

3.37

MHz

GBW

Gain bandwidth

300

kHz

ILIMITP

High-side switch current limit

1200

1500

1800

mA

ILIMITN

Low-side switch current limit

Reverse current

500

mA

RDSONP

Pin-pin resistance for PFET

IOUT = 200 mA

210

300

m

Ω

RDSONN

Pin-pin resistance for NFET

IOUT = 200 mA

140

240

m

Ω

(1)

All voltage values are with respect to network ground terminal.

(2)

Minimum (Min) and Maximum (Max) limits are specified by design, test, or statistical analysis. Typical (Typ) numbers are not verified, but

do represent the most likely norm. Unless otherwise specified, conditions for Typ specifications are: VIN = 5 V and TJ = 25°C.

6

Submit Documentation Feedback

Copyright © 2015, Texas Instruments Incorporated

Product Folder Links: LP8728B-Q1