LP5562 datasheet(13/52 Pages) TI2

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LP5562

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SNVS820B – APRIL 2013 – REVISED DECEMBER 2016

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Table 3. LED PWM Output Selection Bits

B_ENG_SEL bits[1:0]

G_ENG_SEL bits[3:2]

R_ENG_SEL bits[5:4]

W_ENG_SEL bits[7:6]

DESCRIPTION

Output is controlled via I2C registers

ENG1_MODE and ENG1_EXEC register control LED output PWM

instead of I2C register

ENG2_MODE and ENG2_EXEC register control LED output PWM

instead of I2C register

ENG3_MODE and ENG3_EXEC register control LED output PWM

instead of I2C register

7.3.2 Direct I2C Register PWM Control Example

•

Device Start-up

–

Supply 3.6 V to VDD

–

Supply 1.8 V to EN

–

Wait 1 ms

–

Write to address 00h 0100 0000b (chip_en to '1')

–

Wait 500 μs (start-up delay)

•

Use internal clock

–

Write to address 08h 0000 0001b (enable internal clock)

•

Direct PWM control

–

Write to address 70h 0000 0000b (Configure all LED outputs to be controlled from I2C registers)

•

Write PWM values

–

Write to address 02h 1000 0000b (B driver PWM 50% duty cycle)

–

Write to address 03h 1100 0000b (G driver PWM 75% duty cycle)

–

Write to address 04h 1111 1111b (R driver PWM 100% duty cycle)

LEDs are turned on after the PWM values are written. Changes to the PWM value registers are reflected

immediately to the LED brightness. Default LED current (17.5 mA) is used for LED outputs, if no other values are

written.

PWM frequency is either 256 Hz or 558 Hz. Frequency is set with PWM_HF bit in register 08h. When PWM_HF

is 0, the frequency is 256 Hz. When the PWM_HF bit is 1, the PWM frequency is 558 Hz. Brightness adjustment

is either linear or logarithmic. This can be set with LOG_EN bit in register 00h. When LOG_EN = 0 linear

adjustment scale is used and when LOG_EN = 1 logarithmic scale is used. By using logarithmic scale the visual

effect seems linear to the eye. Register control bits are presented in following tables:

Table 4. ENABLE Register (00h)

NAME

BIT

DESCRIPTION

LOG_EN

Logarithmic PWM adjustment enable bit

0 = Linear adjustment

1 = Logarithmic adjustment

Table 5. CONFIG Register (08h)

NAME

BIT

DESCRIPTION

PWM_HF

PWM clock frequency

0 = 256 Hz

1 = 558 Hz

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