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LP5562 датащи(PDF) 32 Page - Texas Instruments

номер детали LP5562
подробное описание детали  LP5562 Four-Channel RGB- or White-LED Driver With Internal Program Memory and Independent Channel Control
PDF  52 Pages
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производитель  TI2 [Texas Instruments]
домашняя страница  https://www.ti.com
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LP5562 датащи(HTML) 32 Page - Texas Instruments

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LP5562
SNVS820B – APRIL 2013 – REVISED DECEMBER 2016
www.ti.com
Product Folder Links: LP5562
Submit Documentation Feedback
Copyright © 2013–2016, Texas Instruments Incorporated
7.6.2 Operation Mode Register (OP Mode) (address = 01h) [reset = 00h]
MODE registers are synchronized to 32-kHz clock. Delay between consecutive I2C writes to OP_MODE register
(01h) need to be longer than 153 μs (typ).
Figure 27. OP Mode Register
7
6
5
4
3
2
1
0
ENG1_MODE[1:0]
ENG1_MODE[1:0]
ENG1_MODE[1:0]
R/W
R/W
R/W
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 28. OP Mode Register Field Descriptions
Bit
Field
Type
Reset
Description
5:4
ENG1_MODE
R/W
Engine 1 operation mode
00b = Disabled
01b = Load program to SRAM, reset engine 1 PC
10b = Run program defined by ENG1_EXEC
11b = Direct control
3:2
ENG2_MODE
R/W
Engine 2 operation mode
00b = Disabled
01b = Load program to SRAM, reset engine 2 PC
10b = Run program defined by ENG2_EXEC
11b = Direct control
1:0
ENG3_MODE
R/W
Engine 3 operation mode
00b = Disabled
01b = Load program to SRAM, reset engine 3 PC
10b = Run program defined by ENG3_EXEC
11b = Direct control
7.6.3 B LED Output PWM Control Register (B_PWM) (address = 02h) [reset = 00h]
Figure 28. B_PWM Control Register
7
6
5
4
3
2
1
0
B_PWM[7:0]
R/W
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 29. B_PWM Register Field Descriptions
Bit
Field
Type
Reset
Description
7:0
B_PWM
R/W
B LED output PWM value during direct control operation mode



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