LMH0366

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SNAS585D – APRIL 2012 – REVISED APRIL 2013

Output Mute

The output mute places the SDO0 and SDO1 outputs into the muted state. When muted, the outputs will be

forced to a logic 0. The output mute has precedence over the bypass mode. See Table 2.

In pin mode, the output mute is controlled by the active-low MUTE pin. The MUTE pin has an internal pullup to

enable the outputs by default.

In SPI mode, the output mute is controlled by register 0x12 bit 1 (MUTE), as long as manual output selection is

not enabled (i.e. as long as register 0x09 bit 5, PIN_MODE_OV, remains cleared). The muted state of the output

drivers can be changed via register 0x14 bit 7 (MUTE_STATE) so that, when muted, the outputs are forced to a

logic 1 instead of a logic 0.

Bypass Mode

The bypass mode forces the reclocker to output the serial data without reclocking it. In bypass mode, bypassed

(non-reclocked) data will be present on both the SDO0 and SDO1 outputs (unless SDO1 is configured for the

serial clock, in which case the SDO1 output will be muted). When not in bypass mode, the reclocker will still

automatically bypass the reclocking function when the detected data rate is a rate which the device does not

support. Note that when the bypass mode is active, lock detect will not assert. See Table 2.

In pin mode, the bypass mode is controlled by the active-high BYPASS pin. The BYPASS pin has an internal

pulldown to disable reclocker bypassing by default.

In SPI mode, the bypass mode is controlled by register 0x12 bit 2 (BYPASS). Note that the eye opening monitor

is not operational while the bypass mode is enabled.

Serial Clock Output Enable (SCO_EN)

The serial clock output enable (SCO_EN) controls whether the SDO1 output is the serial clock or data. When

SCO_EN is asserted, the SDO1 output will be the recovered serial clock. If the SDO1 output is configured for the

serial clock and either bypass mode is activated or the PLL lock is lost, then the SDO1 output will be muted. See

Table 2.

In pin mode, this function is controlled by the active-high SCO_EN pin. The SCO_EN pin has an internal

pulldown to configure the SDO1 output as serial data by default.

In SPI mode, this function is controlled by register 0x12 bit 0 (SCO_EN), as long as manual output selection is

not enabled (i.e. as long as register 0x09 bit 5, PIN_MODE_OV, remains cleared).

Table 2. SDO0 and SDO1 Output Configuration Based on MUTE, BYPASS, SCO_EN and LOCK DETECT

MUTE

BYPASS

SCO_EN

LOCK DETECT

SDO0 Output

SDO1 Output

0

X

X

X

Muted

Muted

1

1

0

0

Bypassed data

Bypassed data

1

1

1

0

Bypassed data

Muted

1

0

0

0

Bypassed data

Bypassed data

1

0

1

0

Bypassed data

Muted

1

0

0

1

Reclocked data

Reclocked data

1

0

1

1

Reclocked data

Recovered clock

Manual Output Selection

In pin mode and in SPI mode with default register settings, the SDO0 and SDO1 outputs are configured by the

BYPASS, MUTE, and SCO_EN functions according to Table 2. (In pin mode, these functions are controlled by

the BYPASS, MUTE, and SCO_EN pins, and in SPI mode, these functions are controlled by register 0x12 bits

2:0.)

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