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TMP86FS28DFG датащи(PDF) 187 Page - Toshiba Semiconductor

номер детали TMP86FS28DFG
подробное описание детали  8 Bit Microcontroller
PDF  272 Pages
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производитель  TOSHIBA [Toshiba Semiconductor]
домашняя страница  http://www.semicon.toshiba.co.jp/eng
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TMP86FS28DFG датащи(HTML) 187 Page - Toshiba Semiconductor

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TMP86FS28DFG
13.4 Transfer Rate
The baud rate of UART0 is set of UART0CR1<BRG>. The example of the baud rate are shown as follows.
When TC3 is used as the UART0 transfer rate (when UART0CR1<BRG> = “110”), the transfer clock and transfer
rate are determined as follows:
Transfer clock [Hz] = TC3 source clock [Hz] / TTREG3 setting value
Transfer Rate [baud] = Transfer clock [Hz] / 16
13.5 Data Sampling Method
The UART0 receiver keeps sampling input using the clock selected by UART0CR1<BRG> until a start bit is
detected in RXD0 pin input. RT clock starts detecting “L” level of the RXD0 pin. Once a start bit is detected, the
start bit, data bits, stop bit(s), and parity bit are sampled at three times of RT7, RT8, and RT9 during one receiver
clock interval (RT clock). (RT0 is the position where the bit supposedly starts.) Bit is determined according to major-
ity rule (The data are the same twice or more out of three samplings).
Figure 13-4 Data Sampling Method
Table 13-1 Transfer Rate (Example)
BRG
Source Clock
16 MHz
8 MHz
4 MHz
000
76800 [baud]
38400 [baud]
19200 [baud]
001
38400
19200
9600
010
19200
9600
4800
011
9600
4800
2400
100
4800
2400
1200
101
2400
1200
600
RT0
1
2
3
4
5
6
7
8
9 10 11 12 13 14 15 0
1
2
3
4
5
6
7
8
9 10 11
Bit 0
Start bit
Bit 0
Start bit
(a) Without noise rejection circuit
RT clock
Internal receive data
RT0
1
2
3
4
5
6
7
8
9 10 11 12 13 14 15 0
1
2
3
4
5
6
7
8
9 10 11
Bit 0
Start bit
Bit 0
Start bit
RT clock
Internal receive data
(b) With noise rejection circuit
RXD0 pin
RXD0 pin



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