24

 2006 Semtech Corp.

www.semtech.com

SC486

POWER MANAGEMENT

Layout Guidelines (Cont.)

Next looking at the VTT output:

C17

1u

C16

10u

VTT

VDDQ

C15

10u

PGND1

18

REF

8

EN/PSV

1

TON

2

VDDQS

3

VCCA

5

FB

6

PGD

7

VSSA

4

PGND2

17

DL

19

VDDP

20

ILIM

21

LX

22

DH

23

BST

24

VTTEN

11

VTT

15

PGND2

16

VTTIN

12

VTTIN

13

VTT

14

VTTS

10

COMP

9

U1

SC486

Figure 13: VTT Output

The output capacitors should be connected right at the chip, on the same side as the chip and right across the pins.

The input capacitor may be placed on the opposite side, if desired. See Figure 14 below:

Figure 14: Example VTT Output Component Placement and Starred Ground

Output capacitors C15 and C16 are placed across the device pins, and connect to the ground plane using multiple

vias. Input capacitor C17 connects directly to the device pins and connects to the ground plane using two vias. Note

that PGND1, PGND2 and VSSA all connect to the pad under the device, which should also connect to the ground

plane using multiple vias.