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SC486 датащи(PDF) 15 Page - Semtech Corporation |
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SC486 датащи(HTML) 15 Page - Semtech Corporation |
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15 / 26 page ![]() 15 2006 Semtech Corp. www.semtech.com SC486 POWER MANAGEMENT Design Procedure - VDDQ Controller Prior to designing an output and making component selections, it is necessary to determine the input voltage range and the output voltage specifications. For purposes of demonstrating the procedure an 8A VDDQ output being used to power VTT at +/-2A for a total IDDQ of 10A will be designed. The maximum input voltage (V BAT(MAX)) is determined by the highest AC adaptor voltage. The minimum input voltage (V BAT(MIN)) is determined by the lowest battery voltage after accounting for voltage drops due to connectors, fuses and battery selector switches. For the purposes of this design example we will use a V BAT range of 9V to 19.2V. Four parameters are needed for the output: 1) nominal output voltage, V OUT (for DDR2 this is 1.8V) 2) static (or DC) tolerance, TOL ST (we will use +/-4% for this design ) 3) transient tolerance, TOL TR and size of transient (we will use +/-100mV for this design). 4) maximum output current, I OUT (we are designing for 10A) Switching frequency determines the trade-off between size and efficiency. Increased frequency increases the switching losses in the MOSFETs, since losses are a function of VIN2. Knowing the maximum input voltage and budget for MOSFET switches usually dictates where the design ends up. The default R tON value of 715kΩ is suggested as a starting point, but it is not set in stone. The first thing to do is to calculate the on-time, t ON, at V BAT(MIN) and VBAT(MAX), since this depends only upon VBAT, V OUT and RtON. () s 10 50 V V 10 37 R 10 3 . 3 t 9 ) MIN ( BAT OUT 3 tON 12 ) MIN ( VBAT _ ON − − • + • • + • • = and () s 10 50 V V 10 37 R 10 3 . 3 t 9 ) MAX ( BAT OUT 3 tON 12 ) MAX ( VBAT _ ON − − • + • • + • • = From these values of t ON we can calculate the nominal switching frequency as follows: () Hz t V V f ) MIN ( VBAT _ ON ) MIN ( BAT OUT ) MIN ( VBAT _ SW • = and () Hz t V V f ) MAX ( VBAT _ ON ) MAX ( BAT OUT ) MAX ( VBAT _ SW • = t ON is generated by a one-shot comparator that samples V BAT via RtON, converting this to a current. This current is used to charge an internal 3.3pF capacitor to V OUT. The equations above reflect this along with any internal components or delays that influence t ON. For our DDR2 VDDQ example we select R tON = 715kΩ: t ON_VBAT(MIN) = 546ns and tON_VBAT(MAX) = 283ns f SW_VBAT(MIN) = 366kHz and fSW_VBAT(MAX) = 332kHz Now that we know t ON we can calculate suitable values for the inductor. To do this we select an acceptable inductor ripple current. The calculations below assume 50% of I OUT which will give us a starting place. () ()H I 5 . 0 t V V L OUT ) MIN ( VBAT _ ON OUT ) MIN ( BAT ) MIN ( VBAT • • − = and () () H I 5 . 0 t V V L OUT ) MAX ( VBAT _ ON OUT ) MAX ( BAT ) MAX ( VBAT • • − = For our DDR2 VDDQ example: L VBAT(MIN) = 0.8µH and LVBAT(MAX) = 1.0µH We will select an inductor value of 1.5µH to reduce the ripple current, which can be calculated as follows: () P P ) MIN ( VBAT _ ON OUT ) MIN ( BAT ) MIN ( VBAT _ RIPPLE A L t V V I − • − = and () P P ) MAX ( VBAT _ ON OUT ) MAX ( BAT ) MAX ( VBAT _ RIPPLE A L t V V I − • − = |
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