HT45R34 datasheet(18/41 Pages) HOLTEK

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HT45R34

Rev. 1.20

October 15, 2007

V D D

P A 0 ~ P A 7

O P 0 ~ O P 7

T M R f o r P A 2 o n l y

I N T 0 f o r P A 0 o n l y

I N T 1 f o r P A 1 o n l y

S y s t e m W a k e - u p

( P A o n l y )

R e a d D a t a R e g i s t e r

C o n t r o l B i t

P u l l - h i g h

D a t a B u s

W r i t e C o n t r o l R e g i s t e r

C h i p R e s e t

R e a d C o n t r o l R e g i s t e r

W r i t e D a t a R e g i s t e r

D a t a B i t

C K

Input/Output Ports

There are 8 bidirectional input/output lines in the

microcontroller, all located within port PA. All of these I/O

ports can be used for input and output operations. For

input operation, these ports are non-latching, that is, the

inputs must be ready at the T2 rising edge of the

²MOV

A,[m]

² instruction. For output operation, all the data is

latched and remains unchanged until the output latch is re-

written.

Each I/O line has its own control register, known as

PAC, to control the input/output configuration. With this

control register, the pin status is either a CMOS output

or a Schmitt trigger input, but can be reconfigured dy-

namically, under software control. To function as an in-

put, the corresponding bit in the control register must be

written with a

²1². The input source also depends on the

control register. If the control register bit is

²1², the input will

read the pad state. If the control register bit is

²0², the con-

tents of the latches will move to the internal bus. The latter

is possible in the read-modify-write instruction.

When setup as an output the output types are CMOS.

After a device reset, the I/O ports will be initially all setup

as inputs, and will therefore be in a high state if the

configuration options have selected pull-high resistors,

otherwise they will be in a floating condition. Each bit of

these input/output latches can be set or cleared by the

²SET [m].i² and ²CLR [m].i² instructions.

Some instructions first input data and then follow the

output operations. For example,

²SET [m].i², ²CLR

[m].i

², ²CPL [m]², ²CPLA [m]² read the entire port states

into the CPU, execute the defined operations

(bit-operation), and then write the results back to the

latches or the accumulator.

Each line of port A has the capability of waking-up the de-

vice.

Each line of port A has a pull-high option. Once the

pull-high option is selected, the I/O line will have a

pull-high resistor connected. Otherwise, the pull-high re-

sistors are absent. It should be noted that a

non-pull-high I/O line operating in an input mode will be

in a floating state.

The PA0, PA1 and PA2 are pin-shared with INT0, INT1

and TMR pins, respectively.

It is recommended that unused or not bonded out I/O

lines should be set as output pins using software in-

struction to avoid consuming power under input floating

state.

Low Voltage Reset

- LVR

The microcontroller provides a low voltage reset circuit

in order to monitor the supply voltage of the device. If the

supply voltage of the device is within the range

0.9V~VLVR, such as when changing a battery, the LVR

will automatically reset the device internally.

The LVR includes the following specifications:

· The low voltage (0.9V~V

LVR) has to remain in its origi-

nal state for longer than tLVR. If the low voltage state

does not exceed tLVR, the LVR will ignore it and will not

perform a reset function.

· The LVR uses an

²OR² function with the external RES

signal to perform a chip reset.

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