HT45R34 datasheet(7/41 Pages) HOLTEK

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HT45R34

Rev. 1.20

October 15, 2007

by a return instruction, RET or RETI, the program counter

is restored to its previous value from the stack. After a de-

vice reset, the stack pointer will point to the top of the

stack.

If the stack is full and a non-masked interrupt takes

place, the interrupt request flag will be recorded but the

acknowledgment will be inhibited. When the stack

pointer is decremented, by RET or RETI, the interrupt

will be serviced. This feature prevents stack overflow al-

lowing the programmer to use the structure more easily.

In a similar case, if the stack is full and a

²CALL² is sub-

sequently executed, stack overflow occurs and the first

entry will be lost as only the most recent 4 return ad-

dresses are stored.

Data Memory

- RAM

The data memory has a capacity of 111

´8 bits. The data

memory is divided into two functional groups: special

function registers and general purpose data memory

(88

´8). Most are read/write, but some are read only.

The general purpose data memory, addressed from 28H

to 7FH, is used for data and control information under in-

struction commands.

All of the data memory areas can handle arithmetic,

logic, increment, decrement and rotate operations di-

rectly. Except for some dedicated bits, each bit in the

data memory can be set and reset by the

²SET [m].i²

and

²CLR [m].i² bit manipulation instructions. They are

also indirectly accessible through the memory pointer

registers (MP0;01H, MP1;02H).

Indirect Addressing Register

The method of indirect addressing allows data manipu-

lation using memory pointers instead of the usual direct

memory addressing method where the actual memory

address is defined. Any action on the indirect address-

ing registers will result in corresponding read/write oper-

ations to the memory location specified by the

corresponding memory pointers. This device contains

two indirect addressing registers known as IAR0 and

IAR1 and two memory pointers MP0 and MP1. Note that

these indirect addressing registers are not physically

implemented and that reading the indirect addressing

registers indirectly will return a result of

²00H² and writ-

ing to the registers indirectly will result in no operation.

The two memory pointers, MP0 and MP1, are physically

implemented in the data memory and can be manipu-

lated in the same way as normal registers providing a

convenient way with which to address and track data.

When any operation to the relevant indirect addressing

registers is carried out, the actual address that the

microcontroller is directed to is the address specified by

the related memory pointer.

Bit 7 of the memory pointers are not implemented. How-

ever, it must be noted that when the memory pointers in

this device is read, a value of

²1² will be read.

Accumulator

The accumulator is closely related to ALU operations. It

is also mapped to location

²05H² of the data memory

and can carry out immediate data operations. The data

movement between two data memory locations must

pass through the accumulator.

S p e c i a l P u r p o s e

D a t a M e m o r y

0 0 H

0 1 H

0 2 H

0 3 H

0 4 H

0 5 H

0 6 H

0 7 H

0 8 H

0 9 H

0 A H

0 B H

0 C H

0 D H

0 E H

0 F H

1 0 H

1 1 H

1 2 H

1 3 H

1 4 H

1 5 H

1 6 H

1 7 H

1 8 H

1 9 H

1 A H

1 B H

1 C H

1 D H

1 E H

1 F H

: U n u s e d

R e a d a s " 0 0 "

2 0 H

G e n e r a l P u r p o s e D a t a M e m o r y

( 8 8 B y t e s )

I n d i r e c t A d d r e s s i n g R e g i s t e r 0

M P 0

I n d i r e c t A d d r e s s i n g R e g i s t e r 1

M P 1

A C C

P C L

T B L P

T B L H

W D T S

S T A T U S

I N T C 0

T M R

T M R C

P A

P A C

A S C R

I N T C 1

T M R A H

T M R A L

R C O C C R

T M R B H

T M R B L

R C O C R

2 1 H

2 2 H

2 3 H

2 4 H

2 5 H

2 6 H

2 7 H

2 8 H

7 F H

RAM Mapping

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